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Timing Features with JNP10K-LC480 and JNP10K-LC4800 Line Cards on MX10004 and MX10008

MX10004 and MX10008 routers with JNP10K-LC480 and JNP10K-LC4800 line cards support SyncE, SyncE over LAG, G.8275.1 Telecom profile, and G.8275.1 over LAG.

MX10004 and MX10008 routers with JNP10K-LC480 and JNP10K-LC4800 line cards support Synchronous Ethernet (SyncE), SyncE over LAG, G.8275.1 Telecom profile, and G.8275.1 over LAG. The support includes the following:

  • Support for SyncE and SyncE over LAG interfaces with primary and secondary SyncE sources from same or different FPCs.

  • Support for hybrid mode in ordinary timeReceiver mode and boundary clock mode of operation, where phase and time are transmitted through PTP packets and frequency is transmitted through the ethernet physical layer using SyncE. This setup is beneficial as SyncE based frequency transmission is more accurate. If the SyncE source is lost in hybrid mode, the system operates in holdover mode for frequency and will continue to use PTP for phase and time.

  • Support for G.8275.1 Telecom ordinary timeReceiver clock and boundary clock with or without LAG.

  • Support for G.8275.1 PTP with native VLAN.

  • Support for configuration of asymmetry value on the timeReceiver ports to compensate for the path asymmetry (timeReceiver to timeTransmitter).

  • Support for GPS output of 10MHz and 1PPS output for measurement purpose—When the node is configured either as a PTP boundary or an ordinary timeReceiver clock, the output PTP clocks (10Mhz and 1PPS) can be monitored for quality. The node can be used as a clock monitoring node in the network.

  • Support for PTPoE stateful ports with or without LAG—Stateful ports are supported only in boundary clock mode and are not supported in ordinary clock mode. PTP stateful ports can be configured on LAG interfaces as well. However, stateful ports are not supported when there are other explicit timeReceiver ports in the system.

The following limitations apply to the support:

  • For JNP10K-LC480, ensure the MPCS(0) firmware version is 0.31.0 or above.

  • Up to 8 interfaces can be configured as SyncE clock sources which is applicable for aggregated Ethernet as well.

  • For PTPoE, stateful and timeReceiver ports are not supported together.

  • For a single PTP over LAG interface, the system supports the configuration of precisely two ports, where one port is designated as the primary and the other as the secondary.

  • Hitless switchover of PTP is not supported for GRES. When the switchover occurs, the PTP servo state starts from FREERUN state to ACQUIRING and then finally to PHASE-ALIGNED state.

  • You will not get a system alert if the same port is configured as a primary PTP interface or secondary PTP interface for multiple AEs.

  • Primary and secondary interfaces for both devices within the PTP over LAG configuration must be the same to ensure consistency and reliable time synchronization. You will not get a system alert if they are not same.

  • Only certain frequencies will pass the SyncE to PTP 1PPS noise transfer test.

  • SNMP support is not provided for PTP stateful ports.

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