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Automatic Clock Selection Overview

Automatic clock selection is the selection of the best quality clock source by the clock source selection algorithm based on the Ethernet Synchronization Message Channel (ESMC) Synchronization Status Message (SSM) quality level, the configured quality level, and the priority.

Clock Source Selection Algorithm

The clock source selection algorithm is triggered by the following events:

  • Changes in the received ESMC SSM quality level (QL)

  • Configuration changes. For example, the addition or deletion of a clock source, a change to the QL mode, and so on.

  • Signal failure detected on the currently selected source.

When the router is configured with automatic clock selection, the system chooses up to two best upstream clock sources. The system then uses the clock recovered from one of the sources to lock the chassis clock. If an upstream clock with acceptable good quality is not available or if the system is configured in free-run mode, the system uses the internal oscillator.

Clock Selection and Quality Level

Automatic clock selection supports two modes: QL enabled and QL disabled.

  • QL disabled— In this mode, the best clock is selected based on the configured ESMC SSM QL. If the QL of the configured clocks are equal, the clock selection is based on the configured priority. If both the configured QL and priority are equal, one of the sources is randomly selected. Absence of the quality-mode-enable statement at the [edit chassis synchronization] hierarchy level means that QL is disabled.

    Note:

    The default setting is QL disable.

  • QL enabled—In this mode, the best clock is selected based on the incoming ESMC SSM QL as long as the incoming QL is at least as good as the source’s configured QL. If the QLs are equal, the clock selection is based on the configured priority. If both the received QL and the priority are equal, one of the sources is selected randomly.

Selection Mode for the Incoming ESMC Quality

Depending on the configuration, the clock source selection algorithm uses the configured or received ESMC SSM quality level for clock selection. In both configured and received selection modes, the interface qualifies for clock source selection only when the received ESMC SSM quality level on the interface is equal to or greater than the configured ESMC SSM quality level for the interface.