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Known Limitations

Learn about limitations in this release for PTX Series routers.

For the most complete and latest information about known Junos OS Evolved defects, use the Juniper Networks online Junos Problem Report Search application.

General Routing

  • This is a transient log which sometimes is seen when LSI is recreated. This has no functional impact. It's generated because of additional dependency of LSI with BD. System takes care of cleaning the token for which this error is generated. This can be confirmed through VTY command > show sandbox token <>. PR1834443

  • In case of PTX, continuous MAC move events of same MAC between two or more interfaces will take a worst case maximum of 2 to 3 seconds, as the TOE block in PTX waits for an ACK from host before it can move the same MAC again to a new interface. The delay is due to the fact that the host ACKs are processed by the TOE block in a two second timer thread. Also, in the BX chipset, there is an additional FIB cache cleanup logic delegated to host, which can add bit more delay in clearing the FIB cache entries in DLU block, to allow new events for the same MAC. Until then the TOE thread will not allow the same MAC to be moved. Due to the above said limitation, the control plane in PTX cannot record more than one MAC move event within the same second. So, to detect and record MAC move events, the below configuration is suggested. set protocols l2-learning global-mac-move threshold-time 10 set routing-instances <ri-name> switch-options mac-move-limit 1 set routing-instances <ri-name> switch-options mac-move-limit packet-action log. PR1839324

  • This hdr_crc_err in FI (Fabric Input block) is due to CRC error corruption in header part of the cell that gone past beyond the FEC. This will result in cell drop. When FPC (LC1301) is starting up user might see dp_X_fi_X_intr_pcs0_hdr_crc_err in inactive system errors. This interrupt happens during the link training phase before the switching core logic input is enabled. So, this cell with hdr_crc_err is dropped and not processed any further. This is expected as the preparation of the link is done earlier, however this will not impact the system as FI block will not be enabled, when this interrupt is raised, during training. This note is applicable for LC1301 and SF5 SIB hardware combination.PR1873313

  • If FPC is yanked out ungracefully out_of_range_spry_indx interrupts might continue to come. This will stop once FPC is online back again. PR1875117