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Schedulers on the Router Hardware, PIC, MIC, and MPC Families

Table 1 compares the PIC, MIC, and MPC interface families with regard to scheduler statements or features. Note that this table reflects the ability to perform the scheduler function at the PIC, MIC, or MPC interface level and not necessarily on the system as a whole.

Table 1: Schedulers on the Router Hardware and Interface Families Compared

Scheduler Statement or Feature:

MIC and MPC Interfaces

IQ PICs

IQ2 PICs

IQ2E PICs

Enhanced IQ PICs

Exact transmit rate

Yes

Yes

–

–

Yes

Rate-limit transmit rate

Yes

–

Yes

Yes

Yes

More than one high-priority queue

Yes

Yes

–

Yes

Yes

Excess priority or sharing

Yes

–

–

–

Yes

Hierarchical Scheduling

Yes, for EQ MPC

–

–

Yes

–