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Line Card Interoperability

This topic describes the line card interoperability feature for MX series devices.

Line card interoperability refers to the compatibility and interaction between the Modular Interface Cards (MICs) or Modular Port Concentrators (MPCs) and the 100-Gigabit Ethernet Physical Interface Cards (PICs) in the MX Series routers. These components work together to provide a flexible and scalable networking solution. Following MICs/MPCs support this feature:

  • MIC: MIC3-3D-1X100GE-CFP

  • MPC: MPC4E (MPC4E-3D-2CGE-8XGE), MPC7E (MPC7E-MRATE), MPC8E (MX2K-MPC8E), and MPC9E (MX2K-MPC9E)

To enable interoperability, you need to set the forwarding mode on MPC/MIC to sa-multicast, and aggregate two 50-Gbps interfaces into a single 100-Gigabit Ethernet interface on the PIC to achieve full throughput capabilities.

Configure SA Multicast Bit Steering Mode

SA multicast mode uses the multicast bit in the source MAC address for packet steering. By default, the SA multicast bit is set to 0 for all packets sent by the MPC/MIC. The egress packet flow is the traffic flowing from the MPC/MIC to the 100-Gigabit Ethernet PIC. Because no VLAN tags are available, the SA multicast bit is sent on the outgoing packets. At the other end, the 100-Gigabit Ethernet PIC checks the multicast bit and forwards the packets to either Packet Forwarding Engine 0 or Packet Forwarding Engine 1. The ingress packet flow is the traffic flowing from the 100-Gigabit Ethernet PIC to the MPC. When the 100-Gigabit Ethernet PIC sends out a packet, the multicast bit is set based on the packet received from the Packet Forwarding Engine. The multicast bit is then transmitted and the MPC checks the multicast bit on ingress.

The interoperability mode between the MPC/MIC and the 100-Gigabit Ethernet PIC is configured on a PIC basis. See the number of Packet Forwarding Engines and hosted PIC details for MPCs that support this feature below:

  • MPC4E contains two Packet Forwarding Engines—PFE 0 hosts PIC 0 and PIC 1 and PFE 1 hosts PIC 2 and PIC 3.

  • MPC7E contains two Packet Forwarding Engines—PFE 0 hosts PIC 0 and PFE 1 hosts PIC 1.

  • MPC8E contains four Packet Forwarding Engines—PIC 0 hosts PFE 0 and PFE 1, PIC 1 hosts PFE 2 and PFE 3.

  • MPC9E contains four Packet Forwarding Engines—PIC 0 hosts PFE 0 and PFE 1, PIC 1 hosts PFE 2 and PFE 3.

To configure SA multicast mode on PIC 1 of an MX480 router with MPC/MIC for interconnection with the 100-Gigabit Ethernet PIC:

  1. Specify the forwarding mode as sa-multicast by including the forwarding-mode statement at the [edit chassis fpc slot pic slot] hierarchy level.
  2. Verify the forwarding mode is set to sa-multicast.

Configure Two 50-Gigabit Ethernet Physical Interfaces on the Ethernet PIC as One Aggregated Ethernet Interface

The 100-Gigabit Ethernet PIC uses a Type 4 FPC and two 50-Gbps Packet Forwarding Engines to achieve a throughput of 100 Gbps. The 50-Gbps physical interfaces are created when the 100-Gigabit Ethernet PIC is plugged in. The two physical interfaces are visible and configuration is allowed on both physical interfaces. The physical interfaces on the 100-Gigabit Ethernet PIC must be configured in static LAG mode without enabling Link Aggregation Control Protocol (LACP). This ensures that a single 100-Gigabit Ethernet aggregated interface is visible on the link connecting to the MPC/MIC instead of two independent 50-Gbps interfaces.

When the PIC is in aggregated Ethernet mode, the two physical interfaces on the same PIC are aggregated into one aggregated Ethernet physical interface. When the PIC is configured with two physical interfaces, it creates the physical interfaces et-x/y/0:0 and et-x/y/0:1 where x is the FPC slot number and y is the PIC slot number.

The default packet steering mode for the 100-Gigabit Ethernet PIC is sa-multicast bit mode. SA multicast configuration is not required on the 100-Gigabit Ethernet PIC to enable this mode.

  1. Specify the number of aggregated Ethernet interfaces to be created.
  2. Specify the members to be included within the aggregated Ethernet bundle.
  3. Verify the configuration at the interface.