Technical Documentation

Configuring a CCC Encapsulation and a Layer 2 Circuit Mode on CE-Facing ATM2 IQ Interfaces

On ATM2 IQ interfaces in a PE router, you need to configure two encapsulations to enable Layer 2 circuits: one at the [edit interfaces at-fpc/pic/port] hierarchy level and the other at the [edit chassis fpc fpc-slot pic pic-slot] hierarchy level. There are two types of ATM2 IQ Layer 2 circuits: cell-relay mode and ATM Adaptation Layer 5 (AAL5) mode. For both modes, you must specify the Physical Interface Card (PIC) type with the pic-type atm2 statement at the [edit interfaces at-fpc/pic/port atm-options] hierarchy level. You can configure only one mode per PIC at a time. If you need to enable both ATM2 IQ Layer 2 circuit modes in the same router, you must configure the different modes on different PICs.

To configure a cell-relay mode Layer 2 circuit, include the atm-l2circuit-mode cell statement at the [edit chassis fpc fpc-slot pic pic-slot] hierarchy level and the encapsulation atm-ccc-cell-relay statement at both the [edit interfaces at-fpc/pic/port] physical hierarchy level and the [edit interfaces at-fpc/pic/port unit unit-number] logical interface hierarchy level.

[edit]chassis {fpc 0 {pic 1 {atm-l2circuit-mode {cell;}}}}interfaces {at-0/1/0 {encapsulation atm-ccc-cell-relay;atm-options {cell-bundle-size 4;pic-type atm2;vpi 0;}unit 0 {encapsulation atm-ccc-cell-relay;vci 32;cell-bundle-size 10;}}}

For ATM2 IQ Layer 2 circuit cell-relay mode only, you can adjust the cell bundle size at the physical interface level and the logical interface level. To configure, include the cell-bundle-size statement at either the [edit interfaces at-fpc/pic/port atm-options] physical interface hierarchy level or the [edit interfaces at-fpc/pic/port unit unit-number] logical interface hierarchy level. If the statement is included at both levels, the logical interface setting takes precedence. The default value for cell bundle size is 1 and the maximum value is 190. If you configure the cell bundle size statement, you should configure the same value on all ATM2 IQ neighbors.

To configure an AAL5 mode Layer 2 circuit, include the atm-l2circuit-mode aal5 statement at the [edit chassis fpcfpc-slot pic pic-slot] hierarchy level and the encapsulation atm-ccc-vc-mux statement at the [edit interfaces at-fpc/pic/port] hierarchy level:

[edit]chassis {fpc 1 {pic 2 {atm-l2circuit-mode {aal5;}}}}interfaces {at-1/2/0 {atm-options {pic-type atm2;vpi 0;}unit 0 {encapsulation atm-ccc-vc-mux;vci 32;}}}

For more information on how to configure interfaces with CCC encapsulation types, see the JUNOS MPLS Applications Configuration Guide or the JUNOS Network Interfaces Configuration Guide.


Published: 2010-04-15