show chassis fabric topology
構文(TXマトリクス ルーター)
show chassis fabrictopology <lcc number | scc> <sib-slot>
構文(TX Matrix Plusルーター)
show chassis fabric topology <lcc number | sfc number> <sib-slot>
構文(T4000 コア ルーター)
show chassis fabric topology <sib-slot>
構文(PTXシリーズパケットトランスポートルーターとQFXシリーズスイッチ)
show chassis fabric topology
形容
(TXマトリクス ルーターのみ)TX Matrix ルーターと T640 ルーター間のスイッチ インターフェイス ボード(SIB)接続のスイッチング ファブリック トポロジーの状態を表示します。
(TX Matrix Plusルーターのみ)TX Matrix Plus ルーターと接続されたルーター間の SIB 接続のスイッチング ファブリック トポロジーの状態を表示します。
(T320、T640、T1600、T4000 ルータのみ)スイッチ インターフェイス ボード(SIB)と FPC 間の接続におけるスイッチング ファブリック トポロジーの状態を表示します。
(PTXシリーズパケットトランスポートルーターおよびQFXシリーズスイッチ)入出力リンクのトポロジーを表示します。
(PTX10002-36QDDルーターのみ)物理的なリンク接続を表示します。
オプション
none | (TXマトリクス ルーターのみ)TX Matrix ルーターと T640 ルーター間のスイッチ インターフェイス ボード(SIB)接続のスイッチング ファブリック トポロジーの状態を表示します。 (TX Matrix Plusルーターのみ)TX Matrix Plus ルーターと接続されたルーター間の SIB 接続のスイッチング ファブリック トポロジーの状態を表示します。 (T320、T640、T1600、T4000 ルータのみ)スイッチ インターフェイス ボード(SIB)と FPC 間の接続におけるスイッチング ファブリック トポロジーの状態を表示します。 PTX10008デバイスでは、ファブリックASIC値の範囲は0〜2で、FPC番号の範囲は0〜7です。 PTX10016デバイスでは、ファブリックASICの範囲は0〜5で、FPC番号の範囲は0〜15です。 (QFXシリーズスイッチ)入出力リンクのトポロジーを表示します。 |
lcc number | (TX MatrixおよびTX Matrix Plusルーターのみ)(オプション)TX Matrixルーターでは、TX Matrixルーターに接続されている指定されたT640ルーター(ラインカードシャーシ)のファブリックトポロジー状態を表示します。TX Matrix Plusルーターでは、TX Matrix Plusルーターに接続されている指定されたルーター(ラインカードシャーシ)のファブリックトポロジー状態を表示します。 LCC設定に応じて、 number を以下の値に置き換えます。
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scc | (TXマトリクス ルーターのみ)(オプション)TXマトリクス ルーター(またはスイッチカード シャーシ)のファブリック トポロジーの状態を表示します。 |
sfc number | (TX Matrix Plusルーターのみ)(オプション)スイッチファブリックシャーシのファブリックトポロジーを表示します。 |
sib-slot | (オプション)指定されたSIBスロットのファブリックトポロジー状態を表示します。 |
必要な権限レベル
眺める
出力フィールド
表 1 は、 show chassis fabric topology
コマンドの出力フィールドをリストしています。出力フィールドは、表示されるおおよその順序に従って示しています。
フィールド名 |
フィールドの説明 |
---|---|
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受信側リンクのファブリックトポロジー |
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送信側リンクのファブリックトポロジー。 |
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ファブリック リンクの状態:
|
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F13 SIB から LCC へのリンクの状態、またはその逆。アウトリンクはTxリンクを示します。インリンクはRxリンクを示します。各 SIB について、以下の追加フィールドが表示されます。 |
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以下は、SIM(LCCまたはSFC)から発信されたリンクの表示出力です SF_[1|3]_port#_FB_[A-D](VCSEL#, fiber)
以下は、SIM(LCCまたはSFC)から発信されたリンクの表示出力です SF_[1|3]_port#_FB_[A-D](VCSEL#, fiber)
以下は、Out-Links の出力に表示されるフィールドの説明を含むサンプル出力です。 Out-Links: ========= SF_30_13_FB_A(21,09) -> FPC7_B_SG(3,3,6)_FB_A(18,09) OK 203 Up |
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以下は、FPC(インリンク)から発信されたリンクの表示出力です FPC#_[T|B]_SG(ASIC#, port#, HSL2_bit)_FB_[A-D](VCSEL#, fiber)
以下は、FPC(インリンク)から発信されたリンクの表示出力です FPC#_[T|B]_SG(ASIC#, port#, HSL2_bit)_FB_[A-D](VCSEL#, fiber)
以下は、In-Links の出力に表示されるフィールドの説明を含むサンプル出力です。 In-Links : ======== FPC0_T_SG(0,0,0)_FB_D(04,11) -> SF_10_00_FB_D(01,11) OK 0 Up
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F13 SIB から SFC/LCC へのリンク、またはその逆のリンクの状態。アウトリンクはTxリンクを示します。インリンクはRxリンクを示します。各 SIB について、以下の追加フィールドが表示されます。
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サンプル出力
- show chassis fabric topology scc(TX Matrixルーター)
- シャーシファブリックトポロジーLCCを示す
- show chassis fabric topology(TX Matrix Plusルーター)
- show chassis fabric topology sfc(TX Matrix Plusルーター)
- show chassis fabric topology lcc(TX Matrix Plusルーター)
- show chassis fabric topology(T4000 コア ルーター)
- show chassis fabric topology lcc(3D SIB搭載TXマトリクス プラス ルーター)
- show chassis fabric topology(PTX5000ルーター)
- show chassis fabric topology(PTX10002-36QDDルーター)
- show chassis fabric topology(PTX10016ルーター)
- show chassis fabric topology(QFX10008スイッチ)
show chassis fabric topology scc(TX Matrixルーター)
user@host> show chassis fabric topology scc scc-re1: -------------------------------------------------------------------------------- fchip (mode) in-links state out-links state -------------------------------------------------------------------------------- Sib #0 : --------- SIB0_F0 (F2 ): LCC0_SIB-L0_F0,03->SIB-S0_F0,00 UP SIB-S0_F0,00->LCC0_SIB-L0_F1,00 UP LCC1_SIB-L0_F0,03->SIB-S0_F0,01 UP SIB-S0_F0,01->LCC1_SIB-L0_F1,08 UP LCC2_SIB-L0_F0,03->SIB-S0_F0,02 RESET SIB-S0_F0,02->LCC2_SIB-L0_F1,08 UP LCC3_SIB-L0_F0,03->SIB-S0_F0,03 RESET SIB-S0_F0,03->LCC3_SIB-L0_F1,00 UP LCC0_SIB-L0_F0,02->SIB-S0_F0,04 UP SIB-S0_F0,04->LCC0_SIB-L0_F1,01 UP LCC1_SIB-L0_F0,02->SIB-S0_F0,05 UP SIB-S0_F0,05->LCC1_SIB-L0_F1,09 UP LCC2_SIB-L0_F0,02->SIB-S0_F0,06 RESET SIB-S0_F0,06->LCC2_SIB-L0_F1,09 UP LCC3_SIB-L0_F0,02->SIB-S0_F0,07 RESET SIB-S0_F0,07->LCC3_SIB-L0_F1,01 UP LCC0_SIB-L0_F0,07->SIB-S0_F0,08 UP SIB-S0_F0,08->LCC0_SIB-L0_F1,04 UP LCC1_SIB-L0_F0,07->SIB-S0_F0,09 UP SIB-S0_F0,09->LCC1_SIB-L0_F1,12 UP LCC2_SIB-L0_F0,07->SIB-S0_F0,10 RESET SIB-S0_F0,10->LCC2_SIB-L0_F1,12 UP LCC3_SIB-L0_F0,07->SIB-S0_F0,11 RESET SIB-S0_F0,11->LCC3_SIB-L0_F1,04 UP LCC0_SIB-L0_F0,06->SIB-S0_F0,12 UP SIB-S0_F0,12->LCC0_SIB-L0_F1,05 UP LCC1_SIB-L0_F0,06->SIB-S0_F0,13 UP SIB-S0_F0,13->LCC1_SIB-L0_F1,13 UP LCC2_SIB-L0_F0,06->SIB-S0_F0,14 RESET SIB-S0_F0,14->LCC2_SIB-L0_F1,13 UP LCC3_SIB-L0_F0,06->SIB-S0_F0,15 RESET SIB-S0_F0,15->LCC3_SIB-L0_F1,05 UP SIB0_F1 (F2 ): LCC0_SIB-L0_F0,11->SIB-S0_F1,00 UP SIB-S0_F1,00->LCC0_SIB-L0_F1,08 UP LCC1_SIB-L0_F0,11->SIB-S0_F1,01 UP SIB-S0_F1,01->LCC1_SIB-L0_F1,00 UP LCC2_SIB-L0_F0,11->SIB-S0_F1,02 RESET SIB-S0_F1,02->LCC2_SIB-L0_F1,00 UP LCC3_SIB-L0_F0,11->SIB-S0_F1,03 RESET SIB-S0_F1,03->LCC3_SIB-L0_F1,08 UP LCC0_SIB-L0_F0,10->SIB-S0_F1,04 UP SIB-S0_F1,04->LCC0_SIB-L0_F1,09 UP LCC1_SIB-L0_F0,10->SIB-S0_F1,05 UP SIB-S0_F1,05->LCC1_SIB-L0_F1,01 UP LCC2_SIB-L0_F0,10->SIB-S0_F1,06 RESET SIB-S0_F1,06->LCC2_SIB-L0_F1,01 UP LCC3_SIB-L0_F0,10->SIB-S0_F1,07 RESET SIB-S0_F1,07->LCC3_SIB-L0_F1,09 UP LCC0_SIB-L0_F0,15->SIB-S0_F1,08 UP SIB-S0_F1,08->LCC0_SIB-L0_F1,12 UP LCC1_SIB-L0_F0,15->SIB-S0_F1,09 UP SIB-S0_F1,09->LCC1_SIB-L0_F1,04 UP LCC2_SIB-L0_F0,15->SIB-S0_F1,10 RESET SIB-S0_F1,10->LCC2_SIB-L0_F1,04 UP LCC3_SIB-L0_F0,15->SIB-S0_F1,11 RESET SIB-S0_F1,11->LCC3_SIB-L0_F1,12 UP LCC0_SIB-L0_F0,14->SIB-S0_F1,12 UP SIB-S0_F1,12->LCC0_SIB-L0_F1,13 UP LCC1_SIB-L0_F0,14->SIB-S0_F1,13 UP SIB-S0_F1,13->LCC1_SIB-L0_F1,05 UP LCC2_SIB-L0_F0,14->SIB-S0_F1,14 RESET SIB-S0_F1,14->LCC2_SIB-L0_F1,05 UP LCC3_SIB-L0_F0,14->SIB-S0_F1,15 RESET SIB-S0_F1,15->LCC3_SIB-L0_F1,13 UP SIB0_F2 (F2 ): LCC3_SIB-L0_F0,13->SIB-S0_F2,00 RESET SIB-S0_F2,00->LCC3_SIB-L0_F1,14 UP LCC2_SIB-L0_F0,13->SIB-S0_F2,01 RESET SIB-S0_F2,01->LCC2_SIB-L0_F1,06 UP LCC1_SIB-L0_F0,13->SIB-S0_F2,02 UP SIB-S0_F2,02->LCC1_SIB-L0_F1,06 UP LCC0_SIB-L0_F0,13->SIB-S0_F2,03 UP SIB-S0_F2,03->LCC0_SIB-L0_F1,14 UP LCC3_SIB-L0_F0,12->SIB-S0_F2,04 RESET SIB-S0_F2,04->LCC3_SIB-L0_F1,15 UP LCC2_SIB-L0_F0,12->SIB-S0_F2,05 RESET SIB-S0_F2,05->LCC2_SIB-L0_F1,07 UP LCC1_SIB-L0_F0,12->SIB-S0_F2,06 UP SIB-S0_F2,06->LCC1_SIB-L0_F1,07 UP LCC0_SIB-L0_F0,12->SIB-S0_F2,07 UP SIB-S0_F2,07->LCC0_SIB-L0_F1,15 UP LCC3_SIB-L0_F0,09->SIB-S0_F2,08 RESET SIB-S0_F2,08->LCC3_SIB-L0_F1,10 UP LCC2_SIB-L0_F0,09->SIB-S0_F2,09 RESET SIB-S0_F2,09->LCC2_SIB-L0_F1,02 UP LCC1_SIB-L0_F0,09->SIB-S0_F2,10 UP SIB-S0_F2,10->LCC1_SIB-L0_F1,02 UP LCC0_SIB-L0_F0,09->SIB-S0_F2,11 UP SIB-S0_F2,11->LCC0_SIB-L0_F1,10 UP LCC3_SIB-L0_F0,08->SIB-S0_F2,12 RESET SIB-S0_F2,12->LCC3_SIB-L0_F1,11 UP LCC2_SIB-L0_F0,08->SIB-S0_F2,13 RESET SIB-S0_F2,13->LCC2_SIB-L0_F1,03 UP LCC1_SIB-L0_F0,08->SIB-S0_F2,14 UP SIB-S0_F2,14->LCC1_SIB-L0_F1,03 UP LCC0_SIB-L0_F0,08->SIB-S0_F2,15 UP SIB-S0_F2,15->LCC0_SIB-L0_F1,11 UP SIB0_F3 (F2 ): LCC3_SIB-L0_F0,05->SIB-S0_F3,00 RESET SIB-S0_F3,00->LCC3_SIB-L0_F1,06 UP LCC2_SIB-L0_F0,05->SIB-S0_F3,01 RESET SIB-S0_F3,01->LCC2_SIB-L0_F1,14 UP LCC1_SIB-L0_F0,05->SIB-S0_F3,02 UP SIB-S0_F3,02->LCC1_SIB-L0_F1,14 UP LCC0_SIB-L0_F0,05->SIB-S0_F3,03 UP SIB-S0_F3,03->LCC0_SIB-L0_F1,06 UP LCC3_SIB-L0_F0,04->SIB-S0_F3,04 RESET SIB-S0_F3,04->LCC3_SIB-L0_F1,07 UP LCC2_SIB-L0_F0,04->SIB-S0_F3,05 RESET SIB-S0_F3,05->LCC2_SIB-L0_F1,15 UP LCC1_SIB-L0_F0,04->SIB-S0_F3,06 UP SIB-S0_F3,06->LCC1_SIB-L0_F1,15 UP LCC0_SIB-L0_F0,04->SIB-S0_F3,07 UP SIB-S0_F3,07->LCC0_SIB-L0_F1,07 UP LCC3_SIB-L0_F0,01->SIB-S0_F3,08 RESET SIB-S0_F3,08->LCC3_SIB-L0_F1,02 UP LCC2_SIB-L0_F0,01->SIB-S0_F3,09 RESET SIB-S0_F3,09->LCC2_SIB-L0_F1,10 UP LCC1_SIB-L0_F0,01->SIB-S0_F3,10 UP SIB-S0_F3,10->LCC1_SIB-L0_F1,10 UP LCC0_SIB-L0_F0,01->SIB-S0_F3,11 UP SIB-S0_F3,11->LCC0_SIB-L0_F1,02 UP LCC3_SIB-L0_F0,00->SIB-S0_F3,12 RESET SIB-S0_F3,12->LCC3_SIB-L0_F1,03 UP LCC2_SIB-L0_F0,00->SIB-S0_F3,13 RESET SIB-S0_F3,13->LCC2_SIB-L0_F1,11 UP LCC1_SIB-L0_F0,00->SIB-S0_F3,14 UP SIB-S0_F3,14->LCC1_SIB-L0_F1,11 UP LCC0_SIB-L0_F0,00->SIB-S0_F3,15 UP SIB-S0_F3,15->LCC0_SIB-L0_F1,03 UP Sib #1 : --------- SIB1_F0 (F2 ): LCC0_SIB-L1_F0,03->SIB-S1_F0,00 RESET SIB-S1_F0,00->LCC0_SIB-L1_F1,00 UP LCC1_SIB-L1_F0,03->SIB-S1_F0,01 RESET SIB-S1_F0,01->LCC1_SIB-L1_F1,08 UP LCC2_SIB-L1_F0,03->SIB-S1_F0,02 RESET SIB-S1_F0,02->LCC2_SIB-L1_F1,08 UP LCC3_SIB-L1_F0,03->SIB-S1_F0,03 RESET SIB-S1_F0,03->LCC3_SIB-L1_F1,00 UP LCC0_SIB-L1_F0,02->SIB-S1_F0,04 RESET SIB-S1_F0,04->LCC0_SIB-L1_F1,01 UP LCC1_SIB-L1_F0,02->SIB-S1_F0,05 RESET SIB-S1_F0,05->LCC1_SIB-L1_F1,09 UP LCC2_SIB-L1_F0,02->SIB-S1_F0,06 RESET SIB-S1_F0,06->LCC2_SIB-L1_F1,09 UP LCC3_SIB-L1_F0,02->SIB-S1_F0,07 RESET SIB-S1_F0,07->LCC3_SIB-L1_F1,01 UP LCC0_SIB-L1_F0,07->SIB-S1_F0,08 RESET SIB-S1_F0,08->LCC0_SIB-L1_F1,04 UP LCC1_SIB-L1_F0,07->SIB-S1_F0,09 RESET SIB-S1_F0,09->LCC1_SIB-L1_F1,12 UP LCC2_SIB-L1_F0,07->SIB-S1_F0,10 RESET SIB-S1_F0,10->LCC2_SIB-L1_F1,12 UP LCC3_SIB-L1_F0,07->SIB-S1_F0,11 RESET SIB-S1_F0,11->LCC3_SIB-L1_F1,04 UP LCC0_SIB-L1_F0,06->SIB-S1_F0,12 RESET SIB-S1_F0,12->LCC0_SIB-L1_F1,05 UP LCC1_SIB-L1_F0,06->SIB-S1_F0,13 RESET SIB-S1_F0,13->LCC1_SIB-L1_F1,13 UP LCC2_SIB-L1_F0,06->SIB-S1_F0,14 RESET SIB-S1_F0,14->LCC2_SIB-L1_F1,13 UP LCC3_SIB-L1_F0,06->SIB-S1_F0,15 RESET SIB-S1_F0,15->LCC3_SIB-L1_F1,05 UP SIB1_F1 (F2 ): LCC0_SIB-L1_F0,11->SIB-S1_F1,00 RESET SIB-S1_F1,00->LCC0_SIB-L1_F1,08 UP LCC1_SIB-L1_F0,11->SIB-S1_F1,01 RESET SIB-S1_F1,01->LCC1_SIB-L1_F1,00 UP LCC2_SIB-L1_F0,11->SIB-S1_F1,02 RESET SIB-S1_F1,02->LCC2_SIB-L1_F1,00 UP LCC3_SIB-L1_F0,11->SIB-S1_F1,03 RESET SIB-S1_F1,03->LCC3_SIB-L1_F1,08 UP LCC0_SIB-L1_F0,10->SIB-S1_F1,04 RESET SIB-S1_F1,04->LCC0_SIB-L1_F1,09 UP LCC1_SIB-L1_F0,10->SIB-S1_F1,05 RESET SIB-S1_F1,05->LCC1_SIB-L1_F1,01 UP LCC2_SIB-L1_F0,10->SIB-S1_F1,06 RESET SIB-S1_F1,06->LCC2_SIB-L1_F1,01 UP LCC3_SIB-L1_F0,10->SIB-S1_F1,07 RESET SIB-S1_F1,07->LCC3_SIB-L1_F1,09 UP LCC0_SIB-L1_F0,15->SIB-S1_F1,08 RESET SIB-S1_F1,08->LCC0_SIB-L1_F1,12 UP LCC1_SIB-L1_F0,15->SIB-S1_F1,09 RESET SIB-S1_F1,09->LCC1_SIB-L1_F1,04 UP LCC2_SIB-L1_F0,15->SIB-S1_F1,10 RESET SIB-S1_F1,10->LCC2_SIB-L1_F1,04 UP LCC3_SIB-L1_F0,15->SIB-S1_F1,11 RESET -S1_F1,11->LCC3_SIB-L1_F1,12,05 UP LCC0_SIB-L1_F0,14->SIB-S1_F1,12 RESET SIB-S1_F1,12->LCC0_SIB-L1_F1,13 UP LCC1_SIB-L1_F0,14->SIB-S1_F1,13 RESET SIB-S1_F1,13->LCC1_SIB-L1_F1,05 UP LCC2_SIB-L1_F0,14->SIB-S1_F1,14 RESET SIB-S1_F1,14->LCC2_SIB-L1_F1,05 UP
シャーシファブリックトポロジーLCCを示す
user@host> show chassis fabric topology lcc 0 lcc0-re0: -------------------------------------------------------------------------- fchip (mode) in-links state out-links state ------------------------------------------------------------------- Sib #2 : --------- SIB2_F0 (F1 ): FPC0_T->SIB-L2_F0,00 DOWN SIB-L2_F0,00->SIB-S2_F3,15 DOWN FPC0_B->SIB-L2_F0,01 UP SIB-L2_F0,01->SIB-S2_F3,11 DOWN FPC1_T->SIB-L2_F0,02 DOWN SIB-L2_F0,02->SIB-S2_F0,04 DOWN FPC1_B->SIB-L2_F0,03 DOWN SIB-L2_F0,03->SIB-S2_F0,00 DOWN FPC2_T->SIB-L2_F0,04 DOWN SIB-L2_F0,04->SIB-S2_F3,07 DOWN FPC2_B->SIB-L2_F0,05 DOWN SIB-L2_F0,05->SIB-S2_F3,03 DOWN FPC3_T->SIB-L2_F0,06 DOWN SIB-L2_F0,06->SIB-S2_F0,12 DOWN FPC3_B->SIB-L2_F0,07 DOWN SIB-L2_F0,07->SIB-S2_F0,08 DOWN FPC4_T->SIB-L2_F0,08 DOWN SIB-L2_F0,08->SIB-S2_F2,15 DOWN FPC4_B->SIB-L2_F0,09 DOWN SIB-L2_F0,09->SIB-S2_F2,11 DOWN FPC5_T->SIB-L2_F0,10 DOWN SIB-L2_F0,10->SIB-S2_F1,04 DOWN FPC5_B->SIB-L2_F0,11 DOWN SIB-L2_F0,11->SIB-S2_F1,00 DOWN FPC6_T->SIB-L2_F0,12 DOWN SIB-L2_F0,12->SIB-S2_F2,07 DOWN FPC6_B->SIB-L2_F0,13 UP SIB-L2_F0,13->SIB-S2_F2,03 DOWN FPC7_T->SIB-L2_F0,14 DOWN SIB-L2_F0,14->SIB-S2_F1,12 DOWN FPC7_B->SIB-L2_F0,15 DOWN SIB-L2_F0,15->SIB-S2_F1,08 DOWN SIB2_F1 (F3 ): SIB-S2_F0,00->SIB-L2_F1,00 UP SIB-L2_F1,00->FPC7_B DOWN SIB-S2_F0,04->SIB-L2_F1,01 UP SIB-L2_F1,01->FPC7_T DOWN SIB-S2_F3,11->SIB-L2_F1,02 UP SIB-L2_F1,02->FPC6_B DOWN SIB-S2_F3,15->SIB-L2_F1,03 UP SIB-L2_F1,03->FPC6_T DOWN SIB-S2_F0,08->SIB-L2_F1,04 UP SIB-L2_F1,04->FPC5_B DOWN SIB-S2_F0,12->SIB-L2_F1,05 UP SIB-L2_F1,05->FPC5_T DOWN SIB-S2_F3,03->SIB-L2_F1,06 UP SIB-L2_F1,06->FPC4_B DOWN SIB-S2_F3,07->SIB-L2_F1,07 UP SIB-L2_F1,07->FPC4_T DOWN SIB-S2_F1,00->SIB-L2_F1,08 UP SIB-L2_F1,08->FPC3_B DOWN SIB-S2_F1,04->SIB-L2_F1,09 UP SIB-L2_F1,09->FPC3_T DOWN SIB-S2_F2,11->SIB-L2_F1,10 UP SIB-L2_F1,10->FPC2_B DOWN SIB-S2_F2,15->SIB-L2_F1,11 UP SIB-L2_F1,11->FPC2_T DOWN SIB-S2_F1,08->SIB-L2_F1,12 UP SIB-L2_F1,12->FPC1_B DOWN SIB-S2_F1,12->SIB-L2_F1,13 UP SIB-L2_F1,13->FPC1_T DOWN SIB-S2_F2,03->SIB-L2_F1,14 UP SIB-L2_F1,14->FPC0_B DOWN SIB-S2_F2,07->SIB-L2_F1,15 UP SIB-L2_F1,15->FPC0_T DOWN Sib #4 : --------- SIB4_F0 (F1 ): FPC0_T->SIB-L4_F0,00 RESET SIB-L4_F0,00->SIB-S4_F3,15 UP FPC0_B->SIB-L4_F0,01 UP SIB-L4_F0,01->SIB-S4_F3,11 UP FPC1_T->SIB-L4_F0,02 RESET SIB-L4_F0,02->SIB-S4_F0,04 UP FPC1_B->SIB-L4_F0,03 RESET SIB-L4_F0,03->SIB-S4_F0,00 UP FPC2_T->SIB-L4_F0,04 RESET SIB-L4_F0,04->SIB-S4_F3,07 UP FPC2_B->SIB-L4_F0,05 RESET SIB-L4_F0,05->SIB-S4_F3,03 UP FPC3_T->SIB-L4_F0,06 RESET SIB-L4_F0,06->SIB-S4_F0,12 UP FPC3_B->SIB-L4_F0,07 RESET SIB-L4_F0,07->SIB-S4_F0,08 UP FPC4_T->SIB-L4_F0,08 RESET SIB-L4_F0,08->SIB-S4_F2,15 UP FPC4_B->SIB-L4_F0,09 RESET SIB-L4_F0,09->SIB-S4_F2,11 UP FPC5_T->SIB-L4_F0,10 RESET SIB-L4_F0,10->SIB-S4_F1,04 UP FPC5_B->SIB-L4_F0,11 RESET SIB-L4_F0,11->SIB-S4_F1,00 UP FPC6_T->SIB-L4_F0,12 RESET SIB-L4_F0,12->SIB-S4_F2,07 UP FPC6_B->SIB-L4_F0,13 UP SIB-L4_F0,13->SIB-S4_F2,03 UP FPC7_T->SIB-L4_F0,14 RESET SIB-L4_F0,14->SIB-S4_F1,12 UP FPC7_B->SIB-L4_F0,15 RESET SIB-L4_F0,15->SIB-S4_F1,08 UP SIB4_F1 (F3 ): SIB-S4_F0,00->SIB-L4_F1,00 UP SIB-L4_F1,00->FPC7_B UP SIB-S4_F0,04->SIB-L4_F1,01 UP SIB-L4_F1,01->FPC7_T UP SIB-S4_F3,11->SIB-L4_F1,02 UP SIB-L4_F1,02->FPC6_B UP SIB-S4_F3,15->SIB-L4_F1,03 UP SIB-L4_F1,03->FPC6_T UP SIB-S4_F0,08->SIB-L4_F1,04 UP SIB-L4_F1,04->FPC5_B UP SIB-S4_F0,12->SIB-L4_F1,05 UP SIB-L4_F1,05->FPC5_T UP SIB-S4_F3,03->SIB-L4_F1,06 UP SIB-L4_F1,06->FPC4_B UP SIB-S4_F3,07->SIB-L4_F1,07 UP SIB-L4_F1,07->FPC4_T UP SIB-S4_F1,00->SIB-L4_F1,08 UP SIB-L4_F1,08->FPC3_B UP SIB-S4_F1,04->SIB-L4_F1,09 UP SIB-L4_F1,09->FPC3_T UP SIB-S4_F2,11->SIB-L4_F1,10 UP SIB-L4_F1,10->FPC2_B UP SIB-S4_F2,15->SIB-L4_F1,11 UP SIB-L4_F1,11->FPC2_T UP SIB-S4_F1,08->SIB-L4_F1,12 UP SIB-L4_F1,12->FPC1_B UP SIB-S4_F1,12->SIB-L4_F1,13 UP SIB-L4_F1,13->FPC1_T UP SIB-S4_F2,03->SIB-L4_F1,14 UP SIB-L4_F1,14->FPC0_B UP SIB-S4_F2,07->SIB-L4_F1,15 UP SIB-L4_F1,15->FPC0_T UP
show chassis fabric topology(TX Matrix Plusルーター)
user@host> show chassis fabric topology sfc0-re0: -------------------------------------------------------------------------- F13_SIB0 ========= Out-Links: ========= SFC0_F13_SIB_00 -> LCC00_ST_SIB_L00 VCSEL HSL2 HSL2 Status Channel Status ================================================================================ SF_30_00_FB_D(04,11) -> FPC0_T_SG(0,0,0)_FB_D(01,11) OK 112 Up SF_30_00_FB_D(04,10) -> FPC0_T_SG(0,0,1)_FB_D(01,10) OK 112 Up SF_30_00_FB_D(04,09) -> FPC0_T_SG(0,0,2)_FB_D(01,09) OK 112 Up SF_30_00_FB_D(04,08) -> FPC0_T_SG(0,0,3)_FB_D(01,08) OK 112 Up SF_30_00_FB_D(04,07) -> FPC0_T_SG(0,0,4)_FB_D(01,07) OK 112 Up SF_30_00_FB_D(04,06) -> FPC0_T_SG(0,0,5)_FB_D(01,06) OK 112 Up SF_30_00_FB_D(04,05) -> FPC0_T_SG(0,0,6)_FB_D(01,05) OK 112 Up SF_30_00_FB_D(04,04) -> FPC0_T_SG(0,0,7)_FB_D(01,04) OK 112 Up SF_30_01_FB_B(16,11) -> FPC4_T_SG(2,0,0)_FB_B(13,11) OK 119 Up SF_30_01_FB_B(16,10) -> FPC4_T_SG(2,0,1)_FB_B(13,10) OK 119 Up SF_30_01_FB_B(16,09) -> FPC4_T_SG(2,0,2)_FB_B(13,09) OK 119 Up SF_30_01_FB_B(16,08) -> FPC4_T_SG(2,0,3)_FB_B(13,08) OK 119 Up SF_30_01_FB_B(16,07) -> FPC4_T_SG(2,0,4)_FB_B(13,07) OK 119 Up SF_30_01_FB_B(16,06) -> FPC4_T_SG(2,0,5)_FB_B(13,06) OK 119 Up SF_30_01_FB_B(16,05) -> FPC4_T_SG(2,0,6)_FB_B(13,05) OK 119 Up SF_30_01_FB_B(16,04) -> FPC4_T_SG(2,0,7)_FB_B(13,04) OK 119 Up SF_30_02_FB_D(05,08) -> FPC1_T_SG(0,2,0)_FB_D(02,08) OK 126 Up SF_30_02_FB_D(05,07) -> FPC1_T_SG(0,2,1)_FB_D(02,07) OK 126 Up SF_30_02_FB_D(05,06) -> FPC1_T_SG(0,2,2)_FB_D(02,06) OK 126 Up SF_30_02_FB_D(05,05) -> FPC1_T_SG(0,2,3)_FB_D(02,05) OK 126 Up SF_30_02_FB_D(05,03) -> FPC1_T_SG(0,2,4)_FB_D(02,03) OK 126 Up SF_30_02_FB_D(05,02) -> FPC1_T_SG(0,2,5)_FB_D(02,02) OK 126 Up SF_30_02_FB_D(05,01) -> FPC1_T_SG(0,2,6)_FB_D(02,01) OK 126 Up SF_30_02_FB_D(05,00) -> FPC1_T_SG(0,2,7)_FB_D(02,00) OK 126 Up SF_30_03_FB_B(17,08) -> FPC5_T_SG(2,2,0)_FB_B(14,08) OK 133 Up SF_30_03_FB_B(17,07) -> FPC5_T_SG(2,2,1)_FB_B(14,07) OK 133 Up SF_30_03_FB_B(17,06) -> FPC5_T_SG(2,2,2)_FB_B(14,06) OK 133 Up SF_30_03_FB_B(17,05) -> FPC5_T_SG(2,2,3)_FB_B(14,05) OK 133 Up SF_30_03_FB_B(17,03) -> FPC5_T_SG(2,2,4)_FB_B(14,03) OK 133 Up SF_30_03_FB_B(17,02) -> FPC5_T_SG(2,2,5)_FB_B(14,02) OK 133 Up SF_30_03_FB_B(17,01) -> FPC5_T_SG(2,2,6)_FB_B(14,01) OK 133 Up SF_30_03_FB_B(17,00) -> FPC5_T_SG(2,2,7)_FB_B(14,00) OK 133 Up SF_30_04_FB_C(10,11) -> FPC2_T_SG(1,0,0)_FB_C(07,11) OK 140 Up SF_30_04_FB_C(10,10) -> FPC2_T_SG(1,0,1)_FB_C(07,10) OK 140 Up SF_30_04_FB_C(10,09) -> FPC2_T_SG(1,0,2)_FB_C(07,09) OK 140 Up SF_30_04_FB_C(10,08) -> FPC2_T_SG(1,0,3)_FB_C(07,08) OK 140 Up SF_30_04_FB_C(10,07) -> FPC2_T_SG(1,0,4)_FB_C(07,07) OK 140 Up SF_30_04_FB_C(10,06) -> FPC2_T_SG(1,0,5)_FB_C(07,06) OK 140 Up SF_30_04_FB_C(10,05) -> FPC2_T_SG(1,0,6)_FB_C(07,05) OK 140 Up SF_30_04_FB_C(10,04) -> FPC2_T_SG(1,0,7)_FB_C(07,04) OK 140 Up SF_30_05_FB_A(22,11) -> FPC6_T_SG(3,0,0)_FB_A(19,11) OK 147 Up SF_30_05_FB_A(22,10) -> FPC6_T_SG(3,0,1)_FB_A(19,10) OK 147 Up SF_30_05_FB_A(22,09) -> FPC6_T_SG(3,0,2)_FB_A(19,09) OK 147 Up SF_30_05_FB_A(22,08) -> FPC6_T_SG(3,0,3)_FB_A(19,08) OK 147 Up SF_30_05_FB_A(22,07) -> FPC6_T_SG(3,0,4)_FB_A(19,07) OK 147 Up SF_30_05_FB_A(22,06) -> FPC6_T_SG(3,0,5)_FB_A(19,06) OK 147 Up SF_30_05_FB_A(22,05) -> FPC6_T_SG(3,0,6)_FB_A(19,05) OK 147 Up SF_30_05_FB_A(22,04) -> FPC6_T_SG(3,0,7)_FB_A(19,04) OK 147 Up SF_30_06_FB_C(11,08) -> FPC3_T_SG(1,2,0)_FB_C(08,08) OK 154 Up SF_30_06_FB_C(11,07) -> FPC3_T_SG(1,2,1)_FB_C(08,07) OK 154 Up SF_30_06_FB_C(11,06) -> FPC3_T_SG(1,2,2)_FB_C(08,06) OK 154 Up SF_30_06_FB_C(11,05) -> FPC3_T_SG(1,2,3)_FB_C(08,05) OK 154 Up SF_30_06_FB_C(11,03) -> FPC3_T_SG(1,2,4)_FB_C(08,03) OK 154 Up SF_30_06_FB_C(11,02) -> FPC3_T_SG(1,2,5)_FB_C(08,02) OK 154 Up SF_30_06_FB_C(11,01) -> FPC3_T_SG(1,2,6)_FB_C(08,01) OK 154 Up SF_30_06_FB_C(11,00) -> FPC3_T_SG(1,2,7)_FB_C(08,00) OK 154 Up …
show chassis fabric topology sfc(TX Matrix Plusルーター)
user@host> show chassis fabric topology sfc 0 sfc0-re0: -------------------------------------------------------------------------- F13_SIB0 ========= Out-Links: ========= SFC0_F13_SIB_00 -> LCC00_ST_SIB_L00 VCSEL HSL2 HSL2 Status Channel Status ================================================================================ SF_30_00_FB_D(04,11) -> FPC0_T_SG(0,0,0)_FB_D(01,11) OK 112 Up SF_30_00_FB_D(04,10) -> FPC0_T_SG(0,0,1)_FB_D(01,10) OK 112 Up SF_30_00_FB_D(04,09) -> FPC0_T_SG(0,0,2)_FB_D(01,09) OK 112 Up SF_30_00_FB_D(04,08) -> FPC0_T_SG(0,0,3)_FB_D(01,08) OK 112 Up SF_30_00_FB_D(04,07) -> FPC0_T_SG(0,0,4)_FB_D(01,07) OK 112 Up SF_30_00_FB_D(04,06) -> FPC0_T_SG(0,0,5)_FB_D(01,06) OK 112 Up SF_30_00_FB_D(04,05) -> FPC0_T_SG(0,0,6)_FB_D(01,05) OK 112 Up SF_30_00_FB_D(04,04) -> FPC0_T_SG(0,0,7)_FB_D(01,04) OK 112 Up SF_30_01_FB_B(16,11) -> FPC4_T_SG(2,0,0)_FB_B(13,11) OK 119 Up SF_30_01_FB_B(16,10) -> FPC4_T_SG(2,0,1)_FB_B(13,10) OK 119 Up SF_30_01_FB_B(16,09) -> FPC4_T_SG(2,0,2)_FB_B(13,09) OK 119 Up SF_30_01_FB_B(16,08) -> FPC4_T_SG(2,0,3)_FB_B(13,08) OK 119 Up SF_30_01_FB_B(16,07) -> FPC4_T_SG(2,0,4)_FB_B(13,07) OK 119 Up SF_30_01_FB_B(16,06) -> FPC4_T_SG(2,0,5)_FB_B(13,06) OK 119 Up SF_30_01_FB_B(16,05) -> FPC4_T_SG(2,0,6)_FB_B(13,05) OK 119 Up SF_30_01_FB_B(16,04) -> FPC4_T_SG(2,0,7)_FB_B(13,04) OK 119 Up SF_30_02_FB_D(05,08) -> FPC1_T_SG(0,2,0)_FB_D(02,08) OK 126 Up SF_30_02_FB_D(05,07) -> FPC1_T_SG(0,2,1)_FB_D(02,07) OK 126 Up SF_30_02_FB_D(05,06) -> FPC1_T_SG(0,2,2)_FB_D(02,06) OK 126 Up SF_30_02_FB_D(05,05) -> FPC1_T_SG(0,2,3)_FB_D(02,05) OK 126 Up SF_30_02_FB_D(05,03) -> FPC1_T_SG(0,2,4)_FB_D(02,03) OK 126 Up SF_30_02_FB_D(05,02) -> FPC1_T_SG(0,2,5)_FB_D(02,02) OK 126 Up SF_30_02_FB_D(05,01) -> FPC1_T_SG(0,2,6)_FB_D(02,01) OK 126 Up SF_30_02_FB_D(05,00) -> FPC1_T_SG(0,2,7)_FB_D(02,00) OK 126 Up SF_30_03_FB_B(17,08) -> FPC5_T_SG(2,2,0)_FB_B(14,08) OK 133 Up SF_30_03_FB_B(17,07) -> FPC5_T_SG(2,2,1)_FB_B(14,07) OK 133 Up SF_30_03_FB_B(17,06) -> FPC5_T_SG(2,2,2)_FB_B(14,06) OK 133 Up SF_30_03_FB_B(17,05) -> FPC5_T_SG(2,2,3)_FB_B(14,05) OK 133 Up SF_30_03_FB_B(17,03) -> FPC5_T_SG(2,2,4)_FB_B(14,03) OK 133 Up SF_30_03_FB_B(17,02) -> FPC5_T_SG(2,2,5)_FB_B(14,02) OK 133 Up SF_30_03_FB_B(17,01) -> FPC5_T_SG(2,2,6)_FB_B(14,01) OK 133 Up SF_30_03_FB_B(17,00) -> FPC5_T_SG(2,2,7)_FB_B(14,00) OK 133 Up SF_30_04_FB_C(10,11) -> FPC2_T_SG(1,0,0)_FB_C(07,11) OK 140 Up SF_30_04_FB_C(10,10) -> FPC2_T_SG(1,0,1)_FB_C(07,10) OK 140 Up SF_30_04_FB_C(10,09) -> FPC2_T_SG(1,0,2)_FB_C(07,09) OK 140 Up SF_30_04_FB_C(10,08) -> FPC2_T_SG(1,0,3)_FB_C(07,08) OK 140 Up SF_30_04_FB_C(10,07) -> FPC2_T_SG(1,0,4)_FB_C(07,07) OK 140 Up SF_30_04_FB_C(10,06) -> FPC2_T_SG(1,0,5)_FB_C(07,06) OK 140 Up SF_30_04_FB_C(10,05) -> FPC2_T_SG(1,0,6)_FB_C(07,05) OK 140 Up SF_30_04_FB_C(10,04) -> FPC2_T_SG(1,0,7)_FB_C(07,04) OK 140 Up SF_30_05_FB_A(22,11) -> FPC6_T_SG(3,0,0)_FB_A(19,11) OK 147 Up SF_30_05_FB_A(22,10) -> FPC6_T_SG(3,0,1)_FB_A(19,10) OK 147 Up SF_30_05_FB_A(22,09) -> FPC6_T_SG(3,0,2)_FB_A(19,09) OK 147 Up SF_30_05_FB_A(22,08) -> FPC6_T_SG(3,0,3)_FB_A(19,08) OK 147 Up SF_30_05_FB_A(22,07) -> FPC6_T_SG(3,0,4)_FB_A(19,07) OK 147 Up SF_30_05_FB_A(22,06) -> FPC6_T_SG(3,0,5)_FB_A(19,06) OK 147 Up SF_30_05_FB_A(22,05) -> FPC6_T_SG(3,0,6)_FB_A(19,05) OK 147 Up SF_30_05_FB_A(22,04) -> FPC6_T_SG(3,0,7)_FB_A(19,04) OK 147 Up SF_30_06_FB_C(11,08) -> FPC3_T_SG(1,2,0)_FB_C(08,08) OK 154 Up SF_30_06_FB_C(11,07) -> FPC3_T_SG(1,2,1)_FB_C(08,07) OK 154 Up SF_30_06_FB_C(11,06) -> FPC3_T_SG(1,2,2)_FB_C(08,06) OK 154 Up SF_30_06_FB_C(11,05) -> FPC3_T_SG(1,2,3)_FB_C(08,05) OK 154 Up SF_30_06_FB_C(11,03) -> FPC3_T_SG(1,2,4)_FB_C(08,03) OK 154 Up SF_30_06_FB_C(11,02) -> FPC3_T_SG(1,2,5)_FB_C(08,02) OK 154 Up SF_30_06_FB_C(11,01) -> FPC3_T_SG(1,2,6)_FB_C(08,01) OK 154 Up SF_30_06_FB_C(11,00) -> FPC3_T_SG(1,2,7)_FB_C(08,00) OK 154 Up …
show chassis fabric topology lcc(TX Matrix Plusルーター)
user@host> show chassis fabric topology lcc 0 lcc0-re0: -------------------------------------------------------------------------- SIB0 ========= Out-Links: ========= LCC00_ST_SIB_L00 -> SFC0_F13_SIB_00 VCSEL HSL2 HSL2 Status Channel Status ================================================================================ FPC0_T_SG(0,0,0)_FB_D(04,11) -> SF_10_00_FB_D(01,11) OK 12 Up FPC0_T_SG(0,0,1)_FB_D(04,10) -> SF_10_00_FB_D(01,10) OK 12 Up FPC0_T_SG(0,0,2)_FB_D(04,09) -> SF_10_00_FB_D(01,09) OK 12 Up FPC0_T_SG(0,0,3)_FB_D(04,08) -> SF_10_00_FB_D(01,08) OK 12 Up FPC0_T_SG(0,0,4)_FB_D(04,07) -> SF_10_00_FB_D(01,07) OK 12 Up FPC0_T_SG(0,0,5)_FB_D(04,06) -> SF_10_00_FB_D(01,06) OK 12 Up FPC0_T_SG(0,0,6)_FB_D(04,05) -> SF_10_00_FB_D(01,05) OK 12 Up FPC0_T_SG(0,0,7)_FB_D(04,04) -> SF_10_00_FB_D(01,04) OK 12 Up FPC0_B_SG(0,1,0)_FB_D(03,07) -> SF_10_10_FB_D(00,07) OK 15 Up FPC0_B_SG(0,1,1)_FB_D(03,06) -> SF_10_10_FB_D(00,06) OK 15 Up FPC0_B_SG(0,1,2)_FB_D(03,05) -> SF_10_10_FB_D(00,05) OK 15 Up FPC0_B_SG(0,1,3)_FB_D(03,04) -> SF_10_10_FB_D(00,04) OK 15 Up FPC0_B_SG(0,1,4)_FB_D(03,03) -> SF_10_10_FB_D(00,03) OK 15 Up FPC0_B_SG(0,1,5)_FB_D(03,02) -> SF_10_10_FB_D(00,02) OK 15 Up FPC0_B_SG(0,1,6)_FB_D(03,01) -> SF_10_10_FB_D(00,01) OK 15 Up FPC0_B_SG(0,1,7)_FB_D(03,00) -> SF_10_10_FB_D(00,00) OK 15 Up FPC1_T_SG(0,2,0)_FB_D(05,08) -> SF_10_02_FB_D(02,08) OK 18 Up FPC1_T_SG(0,2,1)_FB_D(05,07) -> SF_10_02_FB_D(02,07) OK 18 Up FPC1_T_SG(0,2,2)_FB_D(05,06) -> SF_10_02_FB_D(02,06) OK 18 Up FPC1_T_SG(0,2,3)_FB_D(05,05) -> SF_10_02_FB_D(02,05) OK 18 Up FPC1_T_SG(0,2,4)_FB_D(05,03) -> SF_10_02_FB_D(02,03) OK 18 Up FPC1_T_SG(0,2,5)_FB_D(05,02) -> SF_10_02_FB_D(02,02) OK 18 Up FPC1_T_SG(0,2,6)_FB_D(05,01) -> SF_10_02_FB_D(02,01) OK 18 Up FPC1_T_SG(0,2,7)_FB_D(05,00) -> SF_10_02_FB_D(02,00) OK 18 Up FPC1_B_SG(0,3,0)_FB_D(04,03) -> SF_10_11_FB_D(01,03) OK 21 Up FPC1_B_SG(0,3,1)_FB_D(04,02) -> SF_10_11_FB_D(01,02) OK 21 Up FPC1_B_SG(0,3,2)_FB_D(04,01) -> SF_10_11_FB_D(01,01) OK 21 Up FPC1_B_SG(0,3,3)_FB_D(04,00) -> SF_10_11_FB_D(01,00) OK 21 Up FPC1_B_SG(0,3,4)_FB_D(03,11) -> SF_10_11_FB_D(00,11) OK 21 Up FPC1_B_SG(0,3,5)_FB_D(03,10) -> SF_10_11_FB_D(00,10) OK 21 Up FPC1_B_SG(0,3,6)_FB_D(03,09) -> SF_10_11_FB_D(00,09) OK 21 Up FPC1_B_SG(0,3,7)_FB_D(03,08) -> SF_10_11_FB_D(00,08) OK 21 Up FPC2_T_SG(1,0,0)_FB_C(10,11) -> SF_10_04_FB_C(07,11) OK 12 Up FPC2_T_SG(1,0,1)_FB_C(10,10) -> SF_10_04_FB_C(07,10) OK 12 Up FPC2_T_SG(1,0,2)_FB_C(10,09) -> SF_10_04_FB_C(07,09) OK 12 Up FPC2_T_SG(1,0,3)_FB_C(10,08) -> SF_10_04_FB_C(07,08) OK 12 Up FPC2_T_SG(1,0,4)_FB_C(10,07) -> SF_10_04_FB_C(07,07) OK 12 Up FPC2_T_SG(1,0,5)_FB_C(10,06) -> SF_10_04_FB_C(07,06) OK 12 Up FPC2_T_SG(1,0,6)_FB_C(10,05) -> SF_10_04_FB_C(07,05) OK 12 Up FPC2_T_SG(1,0,7)_FB_C(10,04) -> SF_10_04_FB_C(07,04) OK 12 Up FPC2_B_SG(1,1,0)_FB_C(09,07) -> SF_10_14_FB_C(06,07) OK 15 Up FPC2_B_SG(1,1,1)_FB_C(09,06) -> SF_10_14_FB_C(06,06) OK 15 Up FPC2_B_SG(1,1,2)_FB_C(09,05) -> SF_10_14_FB_C(06,05) OK 15 Up FPC2_B_SG(1,1,3)_FB_C(09,04) -> SF_10_14_FB_C(06,04) OK 15 Up FPC2_B_SG(1,1,4)_FB_C(09,03) -> SF_10_14_FB_C(06,03) OK 15 Up FPC2_B_SG(1,1,5)_FB_C(09,02) -> SF_10_14_FB_C(06,02) OK 15 Up FPC2_B_SG(1,1,6)_FB_C(09,01) -> SF_10_14_FB_C(06,01) OK 15 Up FPC2_B_SG(1,1,7)_FB_C(09,00) -> SF_10_14_FB_C(06,00) OK 15 Up FPC3_T_SG(1,2,0)_FB_C(11,08) -> SF_10_06_FB_C(08,08) OK 18 Up FPC3_T_SG(1,2,1)_FB_C(11,07) -> SF_10_06_FB_C(08,07) OK 18 Up FPC3_T_SG(1,2,2)_FB_C(11,06) -> SF_10_06_FB_C(08,06) OK 18 Up FPC3_T_SG(1,2,3)_FB_C(11,05) -> SF_10_06_FB_C(08,05) OK 18 Up FPC3_T_SG(1,2,4)_FB_C(11,03) -> SF_10_06_FB_C(08,03) OK 18 Up FPC3_T_SG(1,2,5)_FB_C(11,02) -> SF_10_06_FB_C(08,02) OK 18 Up FPC3_T_SG(1,2,6)_FB_C(11,01) -> SF_10_06_FB_C(08,01) OK 18 Up ...
show chassis fabric topology(T4000 コア ルーター)
user@host> show chassis fabric topology 0 fchip (mode) In-links State Out-links State -------------------------------------------------------------------------------- SIB0 : --------- Onboard Links ------------- SIB0_XF1,14_0->SIB0_XF,00_0 Up SIB0_XF,00_0->SIB0_XF1,14_0 Up SIB0_XF,00_0->SIB0_XF1,14_0 Up SIB0_XF1,14_0->SIB0_XF,00_0 Up SIB0_XF1,13_0->SIB0_XF,01_0 Up SIB0_XF,01_0->SIB0_XF1,13_0 Up SIB0_XF,01_0->SIB0_XF1,13_0 Up SIB0_XF1,13_0->SIB0_XF,01_0 Up SIB0_XF1,12_0->SIB0_XF,02_0 Up SIB0_XF,02_0->SIB0_XF1,12_0 Up SIB0_XF,02_0->SIB0_XF1,12_0 Up SIB0_XF1,12_0->SIB0_XF,02_0 Up SIB0_XF1,11_0->SIB0_XF,03_0 Up SIB0_XF,03_0->SIB0_XF1,11_0 Up SIB0_XF,03_0->SIB0_XF1,11_0 Up SIB0_XF1,11_0->SIB0_XF,03_0 Up SIB0_XF1,10_0->SIB0_XF,04_0 Up SIB0_XF,04_0->SIB0_XF1,10_0 Up SIB0_XF,04_0->SIB0_XF1,10_0 Up SIB0_XF1,10_0->SIB0_XF,04_0 Up SIB0_XF1,09_0->SIB0_XF,05_0 Up SIB0_XF,05_0->SIB0_XF1,09_0 Up SIB0_XF,05_0->SIB0_XF1,09_0 Up SIB0_XF1,09_0->SIB0_XF,05_0 Up SIB0_XF2,14_0->SIB0_XF,06_0 Up SIB0_XF,06_0->SIB0_XF2,14_0 Up SIB0_XF,06_0->SIB0_XF2,14_0 Up SIB0_XF2,14_0->SIB0_XF,06_0 Up SIB0_XF2,13_0->SIB0_XF,07_0 Up SIB0_XF,07_0->SIB0_XF2,13_0 Up SIB0_XF,07_0->SIB0_XF2,13_0 Up SIB0_XF2,13_0->SIB0_XF,07_0 Up SIB0_XF2,12_0->SIB0_XF,08_0 Up SIB0_XF,08_0->SIB0_XF2,12_0 Up SIB0_XF,08_0->SIB0_XF2,12_0 Up SIB0_XF2,12_0->SIB0_XF,08_0 Up SIB0_XF2,11_0->SIB0_XF,09_0 Up SIB0_XF,09_0->SIB0_XF2,11_0 Up SIB0_XF,09_0->SIB0_XF2,11_0 Up SIB0_XF2,11_0->SIB0_XF,09_0 Up SIB0_XF2,10_0->SIB0_XF,10_0 Up SIB0_XF,10_0->SIB0_XF2,10_0 Up SIB0_XF,10_0->SIB0_XF2,10_0 Up SIB0_XF2,10_0->SIB0_XF,10_0 Up SIB0_XF2,09_0->SIB0_XF,11_0 Up SIB0_XF,11_0->SIB0_XF2,09_0 Up SIB0_XF,11_0->SIB0_XF2,09_0 Up SIB0_XF2,09_0->SIB0_XF,11_0 Up SIB0_XF3,13_0->SIB0_XF,12_0 Up SIB0_XF,12_0->SIB0_XF3,13_0 Up SIB0_XF,12_0->SIB0_XF3,13_0 Up SIB0_XF3,13_0->SIB0_XF,12_0 Up SIB0_XF3,12_0->SIB0_XF,13_0 Up SIB0_XF,13_0->SIB0_XF3,12_0 Up SIB0_XF,13_0->SIB0_XF3,12_0 Up SIB0_XF3,12_0->SIB0_XF,13_0 Up SIB0_XF3,11_0->SIB0_XF,14_0 Up SIB0_XF,14_0->SIB0_XF3,11_0 Up SIB0_XF,14_0->SIB0_XF3,11_0 Up SIB0_XF3,11_0->SIB0_XF,14_0 Up SIB0_XF3,10_0->SIB0_XF,15_0 Up SIB0_XF,15_0->SIB0_XF3,10_0 Up SIB0_XF,15_0->SIB0_XF3,10_0 Up SIB0_XF3,10_0->SIB0_XF,15_0 Up PFE Links --------------- FPC2PFE0->SIB0_XF1,05_0 Up SIB0_XF1,05_0->FPC2PFE0 Up FPC3PFE0->SIB0_XF2,15_0 Up SIB0_XF2,15_0->FPC3PFE0 Up FPC5PFE0->SIB0_XF2,05_0 Up SIB0_XF2,05_0->FPC5PFE0 Up FPC5PFE1->SIB0_XF2,07_0 Up SIB0_XF2,07_0->FPC5PFE1 Up FPC6PFE0->SIB0_XF3,01_0 Up SIB0_XF3,01_0->FPC6PFE0 Up FPC6PFE0->SIB0_XF3,01_1 Up SIB0_XF3,01_1->FPC6PFE0 Up FPC6PFE0->SIB0_XF3,02_0 Up SIB0_XF3,02_0->FPC6PFE0 Up FPC6PFE1->SIB0_XF3,03_0 Up SIB0_XF3,03_0->FPC6PFE1 Up FPC6PFE1->SIB0_XF3,03_1 Up SIB0_XF3,03_1->FPC6PFE1 Up FPC6PFE1->SIB0_XF3,02_1 Up SIB0_XF3,02_1->FPC6PFE1 Up
show chassis fabric topology lcc(3D SIB搭載TXマトリクス プラス ルーター)
user@host> show chassis fabric topology lcc 6 lcc6-re0: -------------------------------------------------------------------------- fchip (mode) In-links State Out-links State -------------------------------------------------------------------------------- SIB0 : --------- CXP0_Evn->LCC_SIB0_XF3,10_0 Up LCC_SIB0_XF3,10_0->CXP0_Evn Up CXP0_Odd->LCC_SIB0_XF3,11_0 Up LCC_SIB0_XF3,11_0->CXP0_Odd Up CXP1_Evn->LCC_SIB0_XF3,12_0 Up LCC_SIB0_XF3,12_0->CXP1_Evn Up CXP1_Odd->LCC_SIB0_XF3,13_0 Up LCC_SIB0_XF3,13_0->CXP1_Odd Up CXP2_Evn->LCC_SIB0_XF2,09_0 Up LCC_SIB0_XF2,09_0->CXP2_Evn Up CXP2_Odd->LCC_SIB0_XF2,10_0 Up LCC_SIB0_XF2,10_0->CXP2_Odd Up CXP3_Evn->LCC_SIB0_XF2,11_0 Up LCC_SIB0_XF2,11_0->CXP3_Evn Up CXP3_Odd->LCC_SIB0_XF2,12_0 Up LCC_SIB0_XF2,12_0->CXP3_Odd Up CXP4_Evn->LCC_SIB0_XF2,13_0 Up LCC_SIB0_XF2,13_0->CXP4_Evn Up CXP4_Odd->LCC_SIB0_XF1,09_0 Up LCC_SIB0_XF1,09_0->CXP4_Odd Up CXP5_Evn->LCC_SIB0_XF2,14_0 Up LCC_SIB0_XF2,14_0->CXP5_Evn Up CXP5_Odd->LCC_SIB0_XF1,10_0 Up LCC_SIB0_XF1,10_0->CXP5_Odd Up CXP6_Evn->LCC_SIB0_XF1,11_0 Up LCC_SIB0_XF1,11_0->CXP6_Evn Up CXP6_Odd->LCC_SIB0_XF1,12_0 Up LCC_SIB0_XF1,12_0->CXP6_Odd Up CXP7_Evn->LCC_SIB0_XF1,13_0 Up LCC_SIB0_XF1,13_0->CXP7_Evn Up CXP7_Odd->LCC_SIB0_XF1,14_0 Up LCC_SIB0_XF1,14_0->CXP7_Odd Up SIB1 : --------- SIB2 : --------- CXP0_Evn->LCC_SIB2_XF3,10_0 Up LCC_SIB2_XF3,10_0->CXP0_Evn Up CXP0_Odd->LCC_SIB2_XF3,11_0 Up LCC_SIB2_XF3,11_0->CXP0_Odd Up CXP1_Evn->LCC_SIB2_XF3,12_0 Up LCC_SIB2_XF3,12_0->CXP1_Evn Up CXP1_Odd->LCC_SIB2_XF3,13_0 Up LCC_SIB2_XF3,13_0->CXP1_Odd Up CXP2_Evn->LCC_SIB2_XF2,09_0 Up LCC_SIB2_XF2,09_0->CXP2_Evn Up CXP2_Odd->LCC_SIB2_XF2,10_0 Up LCC_SIB2_XF2,10_0->CXP2_Odd Up CXP3_Evn->LCC_SIB2_XF2,11_0 Up LCC_SIB2_XF2,11_0->CXP3_Evn Up CXP3_Odd->LCC_SIB2_XF2,12_0 Up LCC_SIB2_XF2,12_0->CXP3_Odd Up CXP4_Evn->LCC_SIB2_XF2,13_0 Up LCC_SIB2_XF2,13_0->CXP4_Evn Up CXP4_Odd->LCC_SIB2_XF1,09_0 Up LCC_SIB2_XF1,09_0->CXP4_Odd Up CXP5_Evn->LCC_SIB2_XF2,14_0 Up LCC_SIB2_XF2,14_0->CXP5_Evn Up CXP5_Odd->LCC_SIB2_XF1,10_0 Up LCC_SIB2_XF1,10_0->CXP5_Odd Up CXP6_Evn->LCC_SIB2_XF1,11_0 Up LCC_SIB2_XF1,11_0->CXP6_Evn Up CXP6_Odd->LCC_SIB2_XF1,12_0 Up LCC_SIB2_XF1,12_0->CXP6_Odd Up CXP7_Evn->LCC_SIB2_XF1,13_0 Up LCC_SIB2_XF1,13_0->CXP7_Evn Up CXP7_Odd->LCC_SIB2_XF1,14_0 Up LCC_SIB2_XF1,14_0->CXP7_Odd Up SIB3 : --------- CXP0_Evn->LCC_SIB3_XF3,10_0 Up LCC_SIB3_XF3,10_0->CXP0_Evn Up CXP0_Odd->LCC_SIB3_XF3,11_0 Up LCC_SIB3_XF3,11_0->CXP0_Odd Up CXP1_Evn->LCC_SIB3_XF3,12_0 Up LCC_SIB3_XF3,12_0->CXP1_Evn Up CXP1_Odd->LCC_SIB3_XF3,13_0 Up LCC_SIB3_XF3,13_0->CXP1_Odd Up CXP2_Evn->LCC_SIB3_XF2,09_0 Up LCC_SIB3_XF2,09_0->CXP2_Evn Up CXP2_Odd->LCC_SIB3_XF2,10_0 Up LCC_SIB3_XF2,10_0->CXP2_Odd Up CXP3_Evn->LCC_SIB3_XF2,11_0 Up LCC_SIB3_XF2,11_0->CXP3_Evn Up CXP3_Odd->LCC_SIB3_XF2,12_0 Up LCC_SIB3_XF2,12_0->CXP3_Odd Up CXP4_Evn->LCC_SIB3_XF2,13_0 Up LCC_SIB3_XF2,13_0->CXP4_Evn Up CXP4_Odd->LCC_SIB3_XF1,09_0 Up LCC_SIB3_XF1,09_0->CXP4_Odd Up CXP5_Evn->LCC_SIB3_XF2,14_0 Up LCC_SIB3_XF2,14_0->CXP5_Evn Up CXP5_Odd->LCC_SIB3_XF1,10_0 Up LCC_SIB3_XF1,10_0->CXP5_Odd Up CXP6_Evn->LCC_SIB3_XF1,11_0 Up LCC_SIB3_XF1,11_0->CXP6_Evn Up CXP6_Odd->LCC_SIB3_XF1,12_0 Up LCC_SIB3_XF1,12_0->CXP6_Odd Up CXP7_Evn->LCC_SIB3_XF1,13_0 Up LCC_SIB3_XF1,13_0->CXP7_Evn Up CXP7_Odd->LCC_SIB3_XF1,14_0 Up LCC_SIB3_XF1,14_0->CXP7_Odd Up SIB4 : --------- CXP0_Evn->LCC_SIB4_XF3,10_0 Up LCC_SIB4_XF3,10_0->CXP0_Evn Up CXP0_Odd->LCC_SIB4_XF3,11_0 Up LCC_SIB4_XF3,11_0->CXP0_Odd Up CXP1_Evn->LCC_SIB4_XF3,12_0 Up LCC_SIB4_XF3,12_0->CXP1_Evn Up CXP1_Odd->LCC_SIB4_XF3,13_0 Up LCC_SIB4_XF3,13_0->CXP1_Odd Up CXP2_Evn->LCC_SIB4_XF2,09_0 Up LCC_SIB4_XF2,09_0->CXP2_Evn Up CXP2_Odd->LCC_SIB4_XF2,10_0 Up LCC_SIB4_XF2,10_0->CXP2_Odd Up CXP3_Evn->LCC_SIB4_XF2,11_0 Up LCC_SIB4_XF2,11_0->CXP3_Evn Up CXP3_Odd->LCC_SIB4_XF2,12_0 Up LCC_SIB4_XF2,12_0->CXP3_Odd Up CXP4_Evn->LCC_SIB4_XF2,13_0 Up LCC_SIB4_XF2,13_0->CXP4_Evn Up CXP4_Odd->LCC_SIB4_XF1,09_0 Up LCC_SIB4_XF1,09_0->CXP4_Odd Up CXP5_Evn->LCC_SIB4_XF2,14_0 Up LCC_SIB4_XF2,14_0->CXP5_Evn Up CXP5_Odd->LCC_SIB4_XF1,10_0 Up LCC_SIB4_XF1,10_0->CXP5_Odd Up CXP6_Evn->LCC_SIB4_XF1,11_0 Up LCC_SIB4_XF1,11_0->CXP6_Evn Up CXP6_Odd->LCC_SIB4_XF1,12_0 Up LCC_SIB4_XF1,12_0->CXP6_Odd Up CXP7_Evn->LCC_SIB4_XF1,13_0 Up LCC_SIB4_XF1,13_0->CXP7_Evn Up CXP7_Odd->LCC_SIB4_XF1,14_0 Up LCC_SIB4_XF1,14_0->CXP7_Odd Up
show chassis fabric topology(PTX5000ルーター)
user@host> show chassis fabric topology In-link : FPC# FE# TQ# (TQ-TX sub-chnl #) -> SIB# TF#_FCORE# (TF-RX port#, TF-RX sub-chn#, TF-RX inst#) Out-link : SIB# TF#_FCORE# (TF-TX port#, TF-TX sub-chn#, TF-TX inst#) -> FPC# FE# TQ# (TQ-RX sub-chnl #) (6, 4, 06) in FPC02FE0TQ0(02)->S01F0_0(6,4,06) will be TF Rx Port 6, TF CCL Rx Sub-Channel 4, TF CCL Rx Instance 6. (2, 7, 10) in S01F0_0(2,7,10)->FPC02FE0TQ0(02) will be TF-Tx Port 2, TF CCL Tx Sub-channel 7, TF CCL Tx Instance 10. SIB 0 FCHIP 0 FCORE 0 : ----------------------- In-links State Out-links State -------------------------------------------------------------------------------- FPC00FE0TQ0(00)->S00F0_0(7,4,07) OK S00F0_0(3,7,11)->FPC00FE0TQ0(00) OK FPC00FE1TQ1(00)->S00F0_0(7,6,07) OK S00F0_0(3,5,11)->FPC00FE1TQ1(00) OK FPC00FE2TQ2(00)->S00F0_0(7,5,07) OK S00F0_0(3,6,11)->FPC00FE2TQ2(00) OK FPC00FE3TQ3(00)->S00F0_0(7,7,07) OK S00F0_0(3,4,11)->FPC00FE3TQ3(00) OK FPC01FE0TQ0(00)->S00F0_0(7,0,07) OK S00F0_0(3,3,11)->FPC01FE0TQ0(00) OK FPC01FE1TQ1(00)->S00F0_0(7,1,07) OK S00F0_0(3,1,11)->FPC01FE1TQ1(00) OK FPC01FE2TQ2(00)->S00F0_0(7,2,07) OK S00F0_0(3,2,11)->FPC01FE2TQ2(00) Error FPC01FE3TQ3(00)->S00F0_0(7,3,07) OK S00F0_0(3,0,11)->FPC01FE3TQ3(00) OK FPC02FE0TQ0(00)->S00F0_0(6,4,06) OK S00F0_0(2,7,10)->FPC02FE0TQ0(00) OK FPC02FE1TQ1(00)->S00F0_0(6,5,06) OK S00F0_0(2,5,10)->FPC02FE1TQ1(00) OK FPC02FE2TQ2(00)->S00F0_0(6,6,06) OK S00F0_0(2,6,10)->FPC02FE2TQ2(00) OK FPC02FE3TQ3(00)->S00F0_0(6,7,06) OK S00F0_0(2,4,10)->FPC02FE3TQ3(00) OK FPC03FE0TQ0(00)->S00F0_0(6,0,06) Down S00F0_0(2,3,10)->FPC03FE0TQ0(00) Down FPC03FE1TQ1(00)->S00F0_0(6,1,06) Down S00F0_0(2,0,10)->FPC03FE1TQ1(00) Down FPC03FE2TQ2(00)->S00F0_0(6,2,06) Down S00F0_0(2,2,10)->FPC03FE2TQ2(00) Down FPC03FE3TQ3(00)->S00F0_0(6,3,06) Down S00F0_0(2,1,10)->FPC03FE3TQ3(00) Down FPC04FE0TQ0(00)->S00F0_0(5,4,05) OK S00F0_0(1,7,09)->FPC04FE0TQ0(00) OK FPC04FE1TQ1(00)->S00F0_0(5,5,05) OK S00F0_0(1,6,09)->FPC04FE1TQ1(00) OK FPC04FE2TQ2(00)->S00F0_0(5,6,05) OK S00F0_0(1,4,09)->FPC04FE2TQ2(00) OK FPC04FE3TQ3(00)->S00F0_0(5,7,05) OK S00F0_0(1,5,09)->FPC04FE3TQ3(00) OK FPC05FE0TQ0(00)->S00F0_0(5,0,05) OK S00F0_0(1,3,09)->FPC05FE0TQ0(00) OK FPC05FE1TQ1(00)->S00F0_0(5,1,05) OK S00F0_0(1,0,09)->FPC05FE1TQ1(00) OK FPC05FE2TQ2(00)->S00F0_0(5,2,05) OK S00F0_0(1,2,09)->FPC05FE2TQ2(00) OK FPC05FE3TQ3(00)->S00F0_0(5,3,05) OK S00F0_0(1,1,09)->FPC05FE3TQ3(00) OK FPC06FE0TQ0(00)->S00F0_0(4,4,04) Down S00F0_0(0,7,08)->FPC06FE0TQ0(00) Down FPC06FE1TQ1(00)->S00F0_0(4,5,04) Down S00F0_0(0,5,08)->FPC06FE1TQ1(00) Down FPC06FE2TQ2(00)->S00F0_0(4,6,04) Down S00F0_0(0,6,08)->FPC06FE2TQ2(00) Down FPC06FE3TQ3(00)->S00F0_0(4,7,04) Down S00F0_0(0,4,08)->FPC06FE3TQ3(00) Down FPC07FE0TQ0(00)->S00F0_0(4,2,04) Down S00F0_0(0,3,08)->FPC07FE0TQ0(00) Down FPC07FE1TQ1(00)->S00F0_0(4,0,04) Down S00F0_0(0,0,08)->FPC07FE1TQ1(00) Down FPC07FE2TQ2(00)->S00F0_0(4,1,04) Down S00F0_0(0,1,08)->FPC07FE2TQ2(00) Down FPC07FE3TQ3(00)->S00F0_0(4,3,04) Down S00F0_0(0,2,08)->FPC07FE3TQ3(00) Down SIB 0 FCHIP 0 FCORE 1 : ----------------------- In-links State Out-links State -------------------------------------------------------------------------------- FPC00FE0TQ0(01)->S00F0_1(3,4,11) OK S00F0_1(7,6,07)->FPC00FE0TQ0(01) OK FPC00FE1TQ1(01)->S00F0_1(3,5,11) OK S00F0_1(7,4,07)->FPC00FE1TQ1(01) OK FPC00FE2TQ2(01)->S00F0_1(3,6,11) OK S00F0_1(7,7,07)->FPC00FE2TQ2(01) OK FPC00FE3TQ3(01)->S00F0_1(3,7,11) OK S00F0_1(7,5,07)->FPC00FE3TQ3(01) OK FPC01FE0TQ0(01)->S00F0_1(3,0,11) OK S00F0_1(7,2,07)->FPC01FE0TQ0(01) OK FPC01FE1TQ1(01)->S00F0_1(3,1,11) OK S00F0_1(7,0,07)->FPC01FE1TQ1(01) OK FPC01FE2TQ2(01)->S00F0_1(3,2,11) OK S00F0_1(7,3,07)->FPC01FE2TQ2(01) OK FPC01FE3TQ3(01)->S00F0_1(3,3,11) OK S00F0_1(7,1,07)->FPC01FE3TQ3(01) OK FPC02FE0TQ0(01)->S00F0_1(2,4,10) OK S00F0_1(6,5,06)->FPC02FE0TQ0(01) OK FPC02FE1TQ1(01)->S00F0_1(2,5,10) OK S00F0_1(6,4,06)->FPC02FE1TQ1(01) OK FPC02FE2TQ2(01)->S00F0_1(2,6,10) OK S00F0_1(6,7,06)->FPC02FE2TQ2(01) OK FPC02FE3TQ3(01)->S00F0_1(2,7,10) OK S00F0_1(6,6,06)->FPC02FE3TQ3(01) OK FPC03FE0TQ0(01)->S00F0_1(2,0,10) Down S00F0_1(6,1,06)->FPC03FE0TQ0(01) Down FPC03FE1TQ1(01)->S00F0_1(2,1,10) Down S00F0_1(6,0,06)->FPC03FE1TQ1(01) Down FPC03FE2TQ2(01)->S00F0_1(2,2,10) Down S00F0_1(6,3,06)->FPC03FE2TQ2(01) Down FPC03FE3TQ3(01)->S00F0_1(2,3,10) Down S00F0_1(6,2,06)->FPC03FE3TQ3(01) Down FPC04FE0TQ0(01)->S00F0_1(1,4,09) OK S00F0_1(5,5,05)->FPC04FE0TQ0(01) OK FPC04FE1TQ1(01)->S00F0_1(1,5,09) OK S00F0_1(5,4,05)->FPC04FE1TQ1(01) OK FPC04FE2TQ2(01)->S00F0_1(1,6,09) OK S00F0_1(5,7,05)->FPC04FE2TQ2(01) OK FPC04FE3TQ3(01)->S00F0_1(1,7,09) OK S00F0_1(5,6,05)->FPC04FE3TQ3(01) OK FPC05FE0TQ0(01)->S00F0_1(1,0,09) OK S00F0_1(5,1,05)->FPC05FE0TQ0(01) OK FPC05FE1TQ1(01)->S00F0_1(1,1,09) OK S00F0_1(5,0,05)->FPC05FE1TQ1(01) OK FPC05FE2TQ2(01)->S00F0_1(1,2,09) OK S00F0_1(5,3,05)->FPC05FE2TQ2(01) OK FPC05FE3TQ3(01)->S00F0_1(1,3,09) OK S00F0_1(5,2,05)->FPC05FE3TQ3(01) OK FPC06FE0TQ0(01)->S00F0_1(0,4,08) Down S00F0_1(4,7,04)->FPC06FE0TQ0(01) Down FPC06FE1TQ1(01)->S00F0_1(0,5,08) Down S00F0_1(4,0,04)->FPC06FE1TQ1(01) Down FPC06FE2TQ2(01)->S00F0_1(0,6,08) Down S00F0_1(4,6,04)->FPC06FE2TQ2(01) Down FPC06FE3TQ3(01)->S00F0_1(0,7,08) Down S00F0_1(4,1,04)->FPC06FE3TQ3(01) Down FPC07FE0TQ0(01)->S00F0_1(0,0,08) Down S00F0_1(4,3,04)->FPC07FE0TQ0(01) Down FPC07FE1TQ1(01)->S00F0_1(0,1,08) Down S00F0_1(4,4,04)->FPC07FE1TQ1(01) Down FPC07FE2TQ2(01)->S00F0_1(0,2,08) Down S00F0_1(4,2,04)->FPC07FE2TQ2(01) Down FPC07FE3TQ3(01)->S00F0_1(0,3,08) Down S00F0_1(4,5,04)->FPC07FE3TQ3(01) Down SIB 1 FCHIP 0 FCORE 0 : ----------------------- In-links State Out-links State -------------------------------------------------------------------------------- FPC00FE0TQ0(02)->S01F0_0(7,4,07) Error S01F0_0(3,7,11)->FPC00FE0TQ0(02) Down FPC00FE1TQ1(02)->S01F0_0(7,6,07) OK S01F0_0(3,5,11)->FPC00FE1TQ1(02) OK FPC00FE2TQ2(02)->S01F0_0(7,5,07) OK S01F0_0(3,6,11)->FPC00FE2TQ2(02) OK FPC00FE3TQ3(02)->S01F0_0(7,7,07) OK S01F0_0(3,4,11)->FPC00FE3TQ3(02) OK FPC01FE0TQ0(02)->S01F0_0(7,0,07) OK S01F0_0(3,3,11)->FPC01FE0TQ0(02) OK FPC01FE1TQ1(02)->S01F0_0(7,1,07) OK S01F0_0(3,1,11)->FPC01FE1TQ1(02) OK FPC01FE2TQ2(02)->S01F0_0(7,2,07) OK S01F0_0(3,2,11)->FPC01FE2TQ2(02) OK FPC01FE3TQ3(02)->S01F0_0(7,3,07) OK S01F0_0(3,0,11)->FPC01FE3TQ3(02) OK FPC02FE0TQ0(02)->S01F0_0(6,4,06) OK S01F0_0(2,7,10)->FPC02FE0TQ0(02) OK FPC02FE1TQ1(02)->S01F0_0(6,5,06) OK S01F0_0(2,5,10)->FPC02FE1TQ1(02) OK FPC02FE2TQ2(02)->S01F0_0(6,6,06) OK S01F0_0(2,6,10)->FPC02FE2TQ2(02) OK FPC02FE3TQ3(02)->S01F0_0(6,7,06) OK S01F0_0(2,4,10)->FPC02FE3TQ3(02) OK FPC03FE0TQ0(02)->S01F0_0(6,0,06) Down S01F0_0(2,3,10)->FPC03FE0TQ0(02) Down FPC03FE1TQ1(02)->S01F0_0(6,1,06) Down S01F0_0(2,0,10)->FPC03FE1TQ1(02) Down FPC03FE2TQ2(02)->S01F0_0(6,2,06) Down S01F0_0(2,2,10)->FPC03FE2TQ2(02) Down FPC03FE3TQ3(02)->S01F0_0(6,3,06) Down S01F0_0(2,1,10)->FPC03FE3TQ3(02) Down FPC04FE0TQ0(02)->S01F0_0(5,4,05) OK S01F0_0(1,7,09)->FPC04FE0TQ0(02) OK FPC04FE1TQ1(02)->S01F0_0(5,5,05) OK S01F0_0(1,6,09)->FPC04FE1TQ1(02) OK FPC04FE2TQ2(02)->S01F0_0(5,6,05) OK S01F0_0(1,4,09)->FPC04FE2TQ2(02) OK FPC04FE3TQ3(02)->S01F0_0(5,7,05) OK S01F0_0(1,5,09)->FPC04FE3TQ3(02) OK FPC05FE0TQ0(02)->S01F0_0(5,0,05) OK S01F0_0(1,3,09)->FPC05FE0TQ0(02) OK FPC05FE1TQ1(02)->S01F0_0(5,1,05) OK S01F0_0(1,0,09)->FPC05FE1TQ1(02) OK FPC05FE2TQ2(02)->S01F0_0(5,2,05) OK S01F0_0(1,2,09)->FPC05FE2TQ2(02) OK FPC05FE3TQ3(02)->S01F0_0(5,3,05) OK S01F0_0(1,1,09)->FPC05FE3TQ3(02) OK FPC06FE0TQ0(02)->S01F0_0(4,4,04) Down S01F0_0(0,7,08)->FPC06FE0TQ0(02) Down FPC06FE1TQ1(02)->S01F0_0(4,5,04) Down S01F0_0(0,5,08)->FPC06FE1TQ1(02) Down FPC06FE2TQ2(02)->S01F0_0(4,6,04) Down S01F0_0(0,6,08)->FPC06FE2TQ2(02) Down FPC06FE3TQ3(02)->S01F0_0(4,7,04) Down S01F0_0(0,4,08)->FPC06FE3TQ3(02) Down FPC07FE0TQ0(02)->S01F0_0(4,2,04) Down S01F0_0(0,3,08)->FPC07FE0TQ0(02) Down FPC07FE1TQ1(02)->S01F0_0(4,0,04) Down S01F0_0(0,0,08)->FPC07FE1TQ1(02) Down FPC07FE2TQ2(02)->S01F0_0(4,1,04) Down S01F0_0(0,1,08)->FPC07FE2TQ2(02) Down FPC07FE3TQ3(02)->S01F0_0(4,3,04) Down S01F0_0(0,2,08)->FPC07FE3TQ3(02) Down SIB 1 FCHIP 0 FCORE 1 : ----------------------- In-links State Out-links State -------------------------------------------------------------------------------- FPC00FE0TQ0(03)->S01F0_1(3,4,11) OK S01F0_1(7,6,07)->FPC00FE0TQ0(03) OK FPC00FE1TQ1(03)->S01F0_1(3,5,11) OK S01F0_1(7,4,07)->FPC00FE1TQ1(03) OK FPC00FE2TQ2(03)->S01F0_1(3,6,11) OK S01F0_1(7,7,07)->FPC00FE2TQ2(03) OK FPC00FE3TQ3(03)->S01F0_1(3,7,11) OK S01F0_1(7,5,07)->FPC00FE3TQ3(03) OK FPC01FE0TQ0(03)->S01F0_1(3,0,11) OK S01F0_1(7,2,07)->FPC01FE0TQ0(03) OK FPC01FE1TQ1(03)->S01F0_1(3,1,11) OK S01F0_1(7,0,07)->FPC01FE1TQ1(03) OK FPC01FE2TQ2(03)->S01F0_1(3,2,11) OK S01F0_1(7,3,07)->FPC01FE2TQ2(03) OK FPC01FE3TQ3(03)->S01F0_1(3,3,11) OK S01F0_1(7,1,07)->FPC01FE3TQ3(03) OK FPC02FE0TQ0(03)->S01F0_1(2,4,10) OK S01F0_1(6,5,06)->FPC02FE0TQ0(03) OK FPC02FE1TQ1(03)->S01F0_1(2,5,10) OK S01F0_1(6,4,06)->FPC02FE1TQ1(03) OK FPC02FE2TQ2(03)->S01F0_1(2,6,10) OK S01F0_1(6,7,06)->FPC02FE2TQ2(03) OK FPC02FE3TQ3(03)->S01F0_1(2,7,10) OK S01F0_1(6,6,06)->FPC02FE3TQ3(03) OK FPC03FE0TQ0(03)->S01F0_1(2,0,10) Down S01F0_1(6,1,06)->FPC03FE0TQ0(03) Down FPC03FE1TQ1(03)->S01F0_1(2,1,10) Down S01F0_1(6,0,06)->FPC03FE1TQ1(03) Down FPC03FE2TQ2(03)->S01F0_1(2,2,10) Down S01F0_1(6,3,06)->FPC03FE2TQ2(03) Down FPC03FE3TQ3(03)->S01F0_1(2,3,10) Down S01F0_1(6,2,06)->FPC03FE3TQ3(03) Down FPC04FE0TQ0(03)->S01F0_1(1,4,09) OK S01F0_1(5,5,05)->FPC04FE0TQ0(03) OK FPC04FE1TQ1(03)->S01F0_1(1,5,09) OK S01F0_1(5,4,05)->FPC04FE1TQ1(03) OK FPC04FE2TQ2(03)->S01F0_1(1,6,09) OK S01F0_1(5,7,05)->FPC04FE2TQ2(03) OK FPC04FE3TQ3(03)->S01F0_1(1,7,09) OK S01F0_1(5,6,05)->FPC04FE3TQ3(03) OK FPC05FE0TQ0(03)->S01F0_1(1,0,09) OK S01F0_1(5,1,05)->FPC05FE0TQ0(03) OK FPC05FE1TQ1(03)->S01F0_1(1,1,09) OK S01F0_1(5,0,05)->FPC05FE1TQ1(03) OK FPC05FE2TQ2(03)->S01F0_1(1,2,09) OK S01F0_1(5,3,05)->FPC05FE2TQ2(03) OK FPC05FE3TQ3(03)->S01F0_1(1,3,09) OK S01F0_1(5,2,05)->FPC05FE3TQ3(03) OK FPC06FE0TQ0(03)->S01F0_1(0,4,08) Down S01F0_1(4,7,04)->FPC06FE0TQ0(03) Down FPC06FE1TQ1(03)->S01F0_1(0,5,08) Down S01F0_1(4,0,04)->FPC06FE1TQ1(03) Down FPC06FE2TQ2(03)->S01F0_1(0,6,08) Down S01F0_1(4,6,04)->FPC06FE2TQ2(03) Down FPC06FE3TQ3(03)->S01F0_1(0,7,08) Down S01F0_1(4,1,04)->FPC06FE3TQ3(03) Down FPC07FE0TQ0(03)->S01F0_1(0,0,08) Down S01F0_1(4,3,04)->FPC07FE0TQ0(03) Down FPC07FE1TQ1(03)->S01F0_1(0,1,08) Down S01F0_1(4,4,04)->FPC07FE1TQ1(03) Down FPC07FE2TQ2(03)->S01F0_1(0,2,08) Down S01F0_1(4,2,04)->FPC07FE2TQ2(03) Down FPC07FE3TQ3(03)->S01F0_1(0,3,08) Down S01F0_1(4,5,04)->FPC07FE3TQ3(03) Down
show chassis fabric topology(PTX10002-36QDDルーター)
user@host> show chassis fabric topology In-link : FPC# FE# (TX inst#, TX sub-chnl #) -> FPC# FE# (RX port#, RX sub-chn#, RX inst#) Out-link : FPC# FE# (TX port#, TX sub-chn#, TX inst#) -> FPC# FE# (RX inst#, RX sub-chnl #) FPC 0 FPFE 0 : ----------------------- In-links State Out-links State -------------------------------------------------------------------------------- FPC00FE2(8,08)->FPC00FE0(8,08) UP FPC00FE0(8,08)->FPC00FE2(8,08) UP FPC00FE3(8,00)->FPC00FE0(8,00) UP FPC00FE0(8,00)->FPC00FE3(8,00) UP FPC00FE3(8,01)->FPC00FE0(8,01) UP FPC00FE0(8,01)->FPC00FE3(8,01) UP FPC00FE3(8,02)->FPC00FE0(8,02) UP FPC00FE0(8,02)->FPC00FE3(8,02) UP FPC00FE3(8,03)->FPC00FE0(8,03) UP FPC00FE0(8,03)->FPC00FE3(8,03) UP FPC00FE3(8,04)->FPC00FE0(8,04) UP FPC00FE0(8,04)->FPC00FE3(8,04) UP FPC00FE3(8,05)->FPC00FE0(8,05) UP FPC00FE0(8,05)->FPC00FE3(8,05) UP FPC00FE3(8,06)->FPC00FE0(8,06) UP FPC00FE0(8,06)->FPC00FE3(8,06) UP FPC00FE3(8,07)->FPC00FE0(8,07) UP FPC00FE0(8,07)->FPC00FE3(8,07) UP … FPC 0 FPFE 1 : ----------------------- In-links State Out-links State -------------------------------------------------------------------------------- FPC00FE2(0,00)->FPC00FE1(0,00) UP FPC00FE1(0,00)->FPC00FE2(0,00) UP FPC00FE2(0,01)->FPC00FE1(0,01) UP FPC00FE1(0,01)->FPC00FE2(0,01) UP FPC00FE2(0,02)->FPC00FE1(0,02) UP FPC00FE1(0,02)->FPC00FE2(0,02) UP FPC00FE2(0,03)->FPC00FE1(0,03) UP FPC00FE1(0,03)->FPC00FE2(0,03) UP FPC00FE2(0,04)->FPC00FE1(0,04) UP FPC00FE1(0,04)->FPC00FE2(0,04) UP FPC00FE2(0,05)->FPC00FE1(0,05) UP FPC00FE1(0,05)->FPC00FE2(0,05) UP FPC00FE2(0,06)->FPC00FE1(0,06) UP FPC00FE1(0,06)->FPC00FE2(0,06) UP … FPC 0 FPFE 2 : ----------------------- In-links State Out-links State -------------------------------------------------------------------------------- FPC00FE0(8,08)->FPC00FE2(8,08) UP FPC00FE2(8,08)->FPC00FE0(8,08) UP FPC00FE1(8,00)->FPC00FE2(8,00) UP FPC00FE2(8,00)->FPC00FE1(8,00) UP FPC00FE1(8,01)->FPC00FE2(8,01) UP FPC00FE2(8,01)->FPC00FE1(8,01) UP FPC00FE1(8,02)->FPC00FE2(8,02) UP FPC00FE2(8,02)->FPC00FE1(8,02) UP FPC00FE1(8,03)->FPC00FE2(8,03) UP FPC00FE2(8,03)->FPC00FE1(8,03) UP FPC00FE1(8,04)->FPC00FE2(8,04) UP FPC00FE2(8,04)->FPC00FE1(8,04) UP FPC00FE1(8,05)->FPC00FE2(8,05) UP FPC00FE2(8,05)->FPC00FE1(8,05) UP FPC00FE1(8,06)->FPC00FE2(8,06) UP FPC00FE2(8,06)->FPC00FE1(8,06) UP FPC00FE1(8,07)->FPC00FE2(8,07) UP FPC00FE2(8,07)->FPC00FE1(8,07) UP FPC00FE1(7,01)->FPC00FE2(7,01) UP FPC00FE2(7,01)->FPC00FE1(7,01) UP FPC00FE1(7,02)->FPC00FE2(7,02) UP FPC00FE2(7,02)->FPC00FE1(7,02) UP … FPC 0 FPFE 3 : ----------------------- In-links State Out-links State -------------------------------------------------------------------------------- FPC00FE0(0,00)->FPC00FE3(0,00) UP FPC00FE3(0,00)->FPC00FE0(0,00) UP FPC00FE0(0,01)->FPC00FE3(0,01) UP FPC00FE3(0,01)->FPC00FE0(0,01) UP FPC00FE0(0,02)->FPC00FE3(0,02) UP FPC00FE3(0,02)->FPC00FE0(0,02) UP FPC00FE0(0,03)->FPC00FE3(0,03) UP FPC00FE3(0,03)->FPC00FE0(0,03) UP FPC00FE0(0,04)->FPC00FE3(0,04) UP FPC00FE3(0,04)->FPC00FE0(0,04) UP FPC00FE0(0,05)->FPC00FE3(0,05) UP FPC00FE3(0,05)->FPC00FE0(0,05) UP FPC00FE0(0,06)->FPC00FE3(0,06) UP FPC00FE3(0,06)->FPC00FE0(0,06) UP FPC00FE0(0,07)->FPC00FE3(0,07) UP FPC00FE3(0,07)->FPC00FE0(0,07) UP …
show chassis fabric topology(PTX10016ルーター)
user@host> show chassis fabric topology In-link : FPC# FE# (TX inst#, TX sub-chnl #) -> SIB# ASIC#_FCORE# (RX port#,RX sub-chn#, RX inst#) Out-link : SIB# ASIC#_FCORE#(TX port#, TX sub-chn#, TX inst#) -> FPC# FE# (RX inst#, RX sub-chnl #) SIB 0 FCHIP 0 FCORE 0 : ----------------------- In-links State Out-links State -------------------------------------------------------------------------------- FPC00FE1(0,05)->S00F0_0(46,0,46) DOWN S00F0_0(46,0,46)->FPC00FE1(0,05) FAULT FPC00FE1(0,07)->S00F0_0(46,1,46) UP S00F0_0(46,1,46)->FPC00FE1(0,07) UP user@host> show chassis fabric topology In-link : FPC# FE# ASIC# (TX inst#, TX sub-chnl #) -> SIB# ASIC#_FCORE# (RX port#, RX sub-chn#, RX inst#) Out-link : SIB# ASIC#_FCORE# (TX port#, TX sub-chn#, TX inst#) -> FPC# FE# ASIC# (RX inst#, RX sub-chnl #) SIB 0 FCHIP 0 FCORE 0 : ----------------------- In-links State Out-links State -------------------------------------------------------------------------------- FPC00FE0(1,17)->S00F0_0(01,0,01) OK S00F0_0(00,0,00)->FPC00FE0(1,09) OK FPC00FE0(1,09)->S00F0_0(02,0,02) OK S00F0_0(00,1,00)->FPC00FE0(1,17) OK FPC00FE0(1,07)->S00F0_0(02,2,02) OK S00F0_0(00,2,00)->FPC00FE0(1,07) OK FPC00FE1(1,12)->S00F0_0(01,1,01) OK S00F0_0(00,3,00)->FPC00FE1(1,06) OK FPC00FE1(1,06)->S00F0_0(01,2,01) OK S00F0_0(01,1,01)->FPC00FE1(1,12) OK FPC00FE1(1,10)->S00F0_0(01,3,01) OK S00F0_0(01,3,01)->FPC00FE1(1,10) OK FPC00FE2(1,16)->S00F0_0(00,4,00) OK S00F0_0(00,4,00)->FPC00FE2(1,08) OK FPC00FE2(1,08)->S00F0_0(01,6,01) OK S00F0_0(00,5,00)->FPC00FE2(1,16) OK FPC00FE2(1,06)->S00F0_0(01,7,01) OK S00F0_0(00,6,00)->FPC00FE2(1,06) OK FPC05FE0(1,07)->S00F0_0(05,5,05) OK S00F0_0(05,2,05)->FPC05FE0(1,17) OK FPC05FE0(1,09)->S00F0_0(05,7,05) OK S00F0_0(06,4,06)->FPC05FE0(1,07) OK FPC05FE0(1,17)->S00F0_0(09,3,09) OK S00F0_0(06,7,06)->FPC05FE0(1,09) OK FPC05FE1(1,06)->S00F0_0(06,1,06) OK S00F0_0(06,0,06)->FPC05FE1(1,06) OK FPC05FE1(1,08)->S00F0_0(06,3,06) OK S00F0_0(06,2,06)->FPC05FE1(1,08) OK FPC05FE1(1,16)->S00F0_0(09,7,09) OK S00F0_0(09,6,09)->FPC05FE1(1,16) OK FPC05FE2(1,10)->S00F0_0(09,0,09) OK S00F0_0(05,0,05)->FPC05FE2(1,06) OK FPC05FE2(1,06)->S00F0_0(09,1,09) OK S00F0_0(05,1,05)->FPC05FE2(1,10) OK FPC05FE2(1,12)->S00F0_0(09,2,09) OK S00F0_0(05,3,05)->FPC05FE2(1,12) OK FPC05FE3(1,11)->S00F0_0(09,4,09) OK S00F0_0(09,4,09)->FPC05FE3(1,07) OK FPC05FE3(1,07)->S00F0_0(09,5,09) OK S00F0_0(09,5,09)->FPC05FE3(1,11) OK FPC05FE3(1,13)->S00F0_0(09,6,09) OK S00F0_0(09,7,09)->FPC05FE3(1,13) OK FPC05FE4(1,16)->S00F0_0(05,3,05) OK S00F0_0(05,4,05)->FPC05FE4(1,06) OK FPC05FE4(1,06)->S00F0_0(06,5,06) OK S00F0_0(05,6,05)->FPC05FE4(1,08) OK FPC05FE4(1,08)->S00F0_0(06,7,06) OK S00F0_0(09,2,09)->FPC05FE4(1,16) OK FPC05FE5(1,10)->S00F0_0(05,0,05) OK S00F0_0(09,0,09)->FPC05FE5(1,06) OK FPC05FE5(1,06)->S00F0_0(05,1,05) OK S00F0_0(09,1,09)->FPC05FE5(1,10) OK FPC05FE5(1,12)->S00F0_0(05,2,05) OK S00F0_0(09,3,09)->FPC05FE5(1,12) OK FPC06FE0(1,17)->S00F0_0(05,6,05) OK S00F0_0(06,6,06)->FPC06FE0(1,17) OK FPC06FE0(1,07)->S00F0_0(07,0,07) OK S00F0_0(08,0,08)->FPC06FE0(1,07) OK FPC06FE0(1,09)->S00F0_0(07,2,07) OK S00F0_0(08,2,08)->FPC06FE0(1,09) OK FPC06FE1(1,16)->S00F0_0(06,2,06) OK S00F0_0(06,3,06)->FPC06FE1(1,16) OK FPC06FE1(1,06)->S00F0_0(07,4,07) OK S00F0_0(07,4,07)->FPC06FE1(1,06) OK FPC06FE1(1,08)->S00F0_0(07,6,07) OK S00F0_0(07,6,07)->FPC06FE1(1,08) OK FPC06FE2(1,06)->S00F0_0(05,4,05) OK S00F0_0(06,5,06)->FPC06FE2(1,06) OK FPC06FE2(1,10)->S00F0_0(07,1,07) OK S00F0_0(08,1,08)->FPC06FE2(1,10) OK FPC06FE2(1,12)->S00F0_0(07,3,07) OK S00F0_0(08,3,08)->FPC06FE2(1,12) OK FPC06FE3(1,07)->S00F0_0(06,0,06) OK S00F0_0(06,1,06)->FPC06FE3(1,07) OK FPC06FE3(1,11)->S00F0_0(07,5,07) OK S00F0_0(07,5,07)->FPC06FE3(1,11) OK FPC06FE3(1,13)->S00F0_0(07,7,07) OK S00F0_0(07,7,07)->FPC06FE3(1,13) OK FPC06FE4(1,16)->S00F0_0(06,6,06) OK S00F0_0(05,7,05)->FPC06FE4(1,16) OK FPC06FE4(1,06)->S00F0_0(08,0,08) OK S00F0_0(07,0,07)->FPC06FE4(1,06) OK FPC06FE4(1,08)->S00F0_0(08,2,08) OK S00F0_0(07,2,07)->FPC06FE4(1,08) OK FPC06FE5(1,06)->S00F0_0(06,4,06) OK S00F0_0(05,5,05)->FPC06FE5(1,06) OK FPC06FE5(1,10)->S00F0_0(08,1,08) OK S00F0_0(07,1,07)->FPC06FE5(1,10) OK FPC06FE5(1,12)->S00F0_0(08,3,08) OK S00F0_0(07,3,07)->FPC06FE5(1,12) OK ... ... FPC15FE5(1,01)->S01F0_0(08,3,08) OK S01F0_0(07,3,07)->FPC06FE5(1,01) OK SIB 0 FCHIP 1 FCORE 0 : ----------------------- In-links State Out-links State -------------------------------------------------------------------------------- FPC00FE0(1,15)->S00F1_0(15,4,15) OK S00F1_0(16,4,16)->FPC00FE0(1,15) OK FPC00FE0(1,11)->S00F1_0(17,4,17) OK S00F1_0(18,4,18)->FPC00FE0(1,11) OK FPC00FE0(1,13)->S00F1_0(17,6,17) OK S00F1_0(18,6,18)->FPC00FE0(1,13) OK FPC00FE1(1,08)->S00F1_0(15,6,15) OK S00F1_0(16,6,16)->FPC00FE1(1,08) OK FPC00FE1(1,14)->S00F1_0(17,5,17) OK S00F1_0(18,5,18)->FPC00FE1(1,14) OK FPC00FE1(1,16)->S00F1_0(17,7,17) OK S00F1_0(18,7,18)->FPC00FE1(1,16) OK FPC00FE2(1,14)->S00F1_0(16,0,16) OK S00F1_0(16,0,16)->FPC00FE2(1,14) OK FPC00FE2(1,10)->S00F1_0(18,0,18) OK S00F1_0(18,0,18)->FPC00FE2(1,10) OK FPC00FE2(1,12)->S00F1_0(18,2,18) OK S00F1_0(18,2,18)->FPC00FE2(1,12) OK FPC05FE0(1,11)->S00F1_0(02,0,02) OK S00F1_0(02,1,02)->FPC05FE0(1,13) OK FPC05FE0(1,13)->S00F1_0(02,2,02) OK S00F1_0(02,3,02)->FPC05FE0(1,11) OK FPC05FE0(1,15)->S00F1_0(04,7,04) OK S00F1_0(03,6,03)->FPC05FE0(1,15) OK FPC05FE1(1,10)->S00F1_0(02,4,02) OK S00F1_0(02,5,02)->FPC05FE1(1,12) OK FPC05FE1(1,12)->S00F1_0(02,6,02) OK S00F1_0(02,7,02)->FPC05FE1(1,10) OK FPC05FE1(1,14)->S00F1_0(04,3,04) OK S00F1_0(04,2,04)->FPC05FE1(1,14) OK FPC05FE2(1,16)->S00F1_0(04,4,04) OK S00F1_0(03,4,03)->FPC05FE2(1,08) OK FPC05FE2(1,08)->S00F1_0(04,5,04) OK S00F1_0(03,5,03)->FPC05FE2(1,16) OK FPC05FE2(1,14)->S00F1_0(04,6,04) OK S00F1_0(03,7,03)->FPC05FE2(1,14) OK FPC05FE3(1,17)->S00F1_0(04,0,04) OK S00F1_0(04,0,04)->FPC05FE3(1,09) OK FPC05FE3(1,09)->S00F1_0(04,1,04) OK S00F1_0(04,1,04)->FPC05FE3(1,17) OK FPC05FE3(1,15)->S00F1_0(04,2,04) OK S00F1_0(04,3,04)->FPC05FE3(1,15) OK FPC05FE4(1,10)->S00F1_0(03,0,03) OK S00F1_0(03,1,03)->FPC05FE4(1,12) OK FPC05FE4(1,12)->S00F1_0(03,2,03) OK S00F1_0(03,3,03)->FPC05FE4(1,10) OK FPC05FE4(1,14)->S00F1_0(03,7,03) OK S00F1_0(04,6,04)->FPC05FE4(1,14) OK FPC05FE5(1,16)->S00F1_0(03,4,03) OK S00F1_0(04,4,04)->FPC05FE5(1,08) OK FPC05FE5(1,08)->S00F1_0(03,5,03) OK S00F1_0(04,5,04)->FPC05FE5(1,16) OK FPC05FE5(1,14)->S00F1_0(03,6,03) OK S00F1_0(04,7,04)->FPC05FE5(1,14) OK FPC06FE0(1,15)->S00F1_0(01,0,01) OK S00F1_0(00,3,00)->FPC06FE0(1,15) OK FPC06FE0(1,11)->S00F1_0(02,1,02) OK S00F1_0(01,0,01)->FPC06FE0(1,13) OK FPC06FE0(1,13)->S00F1_0(02,3,02) OK S00F1_0(01,2,01)->FPC06FE0(1,11) OK FPC06FE1(1,14)->S00F1_0(01,4,01) OK S00F1_0(00,7,00)->FPC06FE1(1,14) OK FPC06FE1(1,10)->S00F1_0(02,5,02) OK S00F1_0(01,4,01)->FPC06FE1(1,12) OK FPC06FE1(1,12)->S00F1_0(02,7,02) OK S00F1_0(01,6,01)->FPC06FE1(1,10) OK FPC06FE2(1,08)->S00F1_0(01,2,01) OK S00F1_0(00,1,00)->FPC06FE2(1,08) OK FPC06FE2(1,16)->S00F1_0(15,0,15) OK S00F1_0(01,5,01)->FPC06FE2(1,16) OK FPC06FE2(1,14)->S00F1_0(15,2,15) OK S00F1_0(01,7,01)->FPC06FE2(1,14) OK FPC06FE3(1,09)->S00F1_0(01,6,01) OK S00F1_0(00,5,00)->FPC06FE3(1,09) OK FPC06FE3(1,17)->S00F1_0(19,4,19) OK S00F1_0(02,4,02)->FPC06FE3(1,17) OK FPC06FE3(1,15)->S00F1_0(19,6,19) OK S00F1_0(02,6,02)->FPC06FE3(1,15) OK FPC06FE4(1,14)->S00F1_0(01,7,01) OK S00F1_0(01,3,01)->FPC06FE4(1,14) OK FPC06FE4(1,10)->S00F1_0(03,1,03) OK S00F1_0(02,0,02)->FPC06FE4(1,12) OK FPC06FE4(1,12)->S00F1_0(03,3,03) OK S00F1_0(02,2,02)->FPC06FE4(1,10) OK FPC06FE5(1,08)->S00F1_0(01,5,01) OK S00F1_0(01,1,01)->FPC06FE5(1,08) OK FPC06FE5(1,16)->S00F1_0(19,0,19) OK S00F1_0(03,0,03)->FPC06FE5(1,16) OK FPC06FE5(1,14)->S00F1_0(19,2,19) OK S00F1_0(03,2,03)->FPC06FE5(1,14) OK ... ... FPC15FE5(1,01)->S01F0_0(08,3,08) OK S01F0_0(07,3,07)->FPC06FE5(1,01) OK SIB 1 FCHIP 0 FCORE 0 : ----------------------- In-links State Out-links State -------------------------------------------------------------------------------- FPC00FE0(1,05)->S01F0_0(01,0,01) OK S01F0_0(00,0,00)->FPC00FE0(0,01) OK FPC00FE0(0,01)->S01F0_0(02,0,02) OK S01F0_0(00,1,00)->FPC00FE0(1,05) OK FPC00FE0(0,07)->S01F0_0(02,2,02) OK S01F0_0(00,2,00)->FPC00FE0(0,07) OK FPC00FE1(1,04)->S01F0_0(00,4,00) OK S01F0_0(00,4,00)->FPC00FE1(0,00) OK FPC00FE1(0,00)->S01F0_0(01,6,01) OK S01F0_0(00,5,00)->FPC00FE1(1,04) OK FPC00FE1(0,06)->S01F0_0(01,7,01) OK S01F0_0(00,6,00)->FPC00FE1(0,06) OK FPC00FE2(1,01)->S01F0_0(01,1,01) OK S01F0_0(00,3,00)->FPC00FE2(0,06) OK FPC00FE2(0,06)->S01F0_0(01,2,01) OK S01F0_0(01,1,01)->FPC00FE2(1,01) OK FPC00FE2(1,00)->S01F0_0(01,3,01) OK S01F0_0(01,3,01)->FPC00FE2(1,00) OK FPC05FE0(0,07)->S01F0_0(05,5,05) OK S01F0_0(05,2,05)->FPC05FE0(1,05) OK FPC05FE0(0,01)->S01F0_0(05,7,05) OK S01F0_0(06,4,06)->FPC05FE0(0,07) OK FPC05FE0(1,05)->S01F0_0(09,3,09) OK S01F0_0(06,7,06)->FPC05FE0(0,01) OK FPC05FE1(1,00)->S01F0_0(09,0,09) OK S01F0_0(05,0,05)->FPC05FE1(0,06) OK FPC05FE1(0,06)->S01F0_0(09,1,09) OK S01F0_0(05,1,05)->FPC05FE1(1,00) OK FPC05FE1(1,01)->S01F0_0(09,2,09) OK S01F0_0(05,3,05)->FPC05FE1(1,01) OK FPC05FE2(0,06)->S01F0_0(06,1,06) OK S01F0_0(06,0,06)->FPC05FE2(0,06) OK FPC05FE2(0,00)->S01F0_0(06,3,06) OK S01F0_0(06,2,06)->FPC05FE2(0,00) OK FPC05FE2(1,04)->S01F0_0(09,7,09) OK S01F0_0(09,6,09)->FPC05FE2(1,04) OK FPC05FE3(1,00)->S01F0_0(09,4,09) OK S01F0_0(09,4,09)->FPC05FE3(0,06) OK FPC05FE3(0,06)->S01F0_0(09,5,09) OK S01F0_0(09,5,09)->FPC05FE3(1,00) OK FPC05FE3(1,01)->S01F0_0(09,6,09) OK S01F0_0(09,7,09)->FPC05FE3(1,01) OK FPC05FE4(0,04)->S01F0_0(05,3,05) OK S01F0_0(05,4,05)->FPC05FE4(0,14) OK FPC05FE4(0,14)->S01F0_0(06,5,06) OK S01F0_0(05,6,05)->FPC05FE4(0,16) OK FPC05FE4(0,16)->S01F0_0(06,7,06) OK S01F0_0(09,2,09)->FPC05FE4(0,04) OK FPC05FE5(1,00)->S01F0_0(05,0,05) OK S01F0_0(09,0,09)->FPC05FE5(0,06) OK FPC05FE5(0,06)->S01F0_0(05,1,05) OK S01F0_0(09,1,09)->FPC05FE5(1,00) OK FPC05FE5(1,01)->S01F0_0(05,2,05) OK S01F0_0(09,3,09)->FPC05FE5(1,01) OK FPC06FE0(1,05)->S01F0_0(05,6,05) OK S01F0_0(06,6,06)->FPC06FE0(1,05) OK FPC06FE0(0,07)->S01F0_0(07,0,07) OK S01F0_0(08,0,08)->FPC06FE0(0,07) OK FPC06FE0(0,01)->S01F0_0(07,2,07) OK S01F0_0(08,2,08)->FPC06FE0(0,01) OK FPC06FE1(0,06)->S01F0_0(05,4,05) OK S01F0_0(06,5,06)->FPC06FE1(0,06) OK FPC06FE1(1,00)->S01F0_0(07,1,07) OK S01F0_0(08,1,08)->FPC06FE1(1,00) OK FPC06FE1(1,01)->S01F0_0(07,3,07) OK S01F0_0(08,3,08)->FPC06FE1(1,01) OK FPC06FE2(1,04)->S01F0_0(06,2,06) OK S01F0_0(06,3,06)->FPC06FE2(1,04) OK FPC06FE2(0,06)->S01F0_0(07,4,07) OK S01F0_0(07,4,07)->FPC06FE2(0,06) OK FPC06FE2(0,00)->S01F0_0(07,6,07) OK S01F0_0(07,6,07)->FPC06FE2(0,00) OK FPC06FE3(0,06)->S01F0_0(06,0,06) OK S01F0_0(06,1,06)->FPC06FE3(0,06) OK FPC06FE3(1,00)->S01F0_0(07,5,07) OK S01F0_0(07,5,07)->FPC06FE3(1,00) OK FPC06FE3(1,01)->S01F0_0(07,7,07) OK S01F0_0(07,7,07)->FPC06FE3(1,01) OK FPC06FE4(0,04)->S01F0_0(06,6,06) OK S01F0_0(05,7,05)->FPC06FE4(0,04) OK FPC06FE4(0,14)->S01F0_0(08,0,08) OK S01F0_0(07,0,07)->FPC06FE4(0,14) OK FPC06FE4(0,16)->S01F0_0(08,2,08) OK S01F0_0(07,2,07)->FPC06FE4(0,16) OK FPC06FE5(0,06)->S01F0_0(06,4,06) OK S01F0_0(05,5,05)->FPC06FE5(0,06) OK FPC06FE5(1,00)->S01F0_0(08,1,08) OK S01F0_0(07,1,07)->FPC06FE5(1,00) OK FPC06FE5(1,01)->S01F0_0(08,3,08) OK S01F0_0(07,3,07)->FPC06FE5(1,01) OK ... ... FPC15FE5(1,01)->S01F0_0(08,3,08) OK S01F0_0(07,3,07)->FPC06FE5(1,01) OK SIB 1 FCHIP 1 FCORE 0 : ----------------------- In-links State Out-links State -------------------------------------------------------------------------------- FPC00FE0(1,03)->S01F1_0(15,4,15) OK S01F1_0(16,4,16)->FPC00FE0(1,03) OK FPC00FE0(0,02)->S01F1_0(17,4,17) OK S01F1_0(18,4,18)->FPC00FE0(0,02) OK FPC00FE0(0,03)->S01F1_0(17,6,17) OK S01F1_0(18,6,18)->FPC00FE0(0,03) OK FPC00FE1(1,02)->S01F1_0(16,0,16) OK S01F1_0(16,0,16)->FPC00FE1(1,02) OK FPC00FE1(1,00)->S01F1_0(18,0,18) OK S01F1_0(18,0,18)->FPC00FE1(1,00) OK FPC00FE1(1,01)->S01F1_0(18,2,18) OK S01F1_0(18,2,18)->FPC00FE1(1,01) OK FPC00FE2(0,00)->S01F1_0(15,6,15) OK S01F1_0(16,6,16)->FPC00FE2(0,00) OK FPC00FE2(1,02)->S01F1_0(17,5,17) OK S01F1_0(18,5,18)->FPC00FE2(1,02) OK FPC00FE2(1,04)->S01F1_0(17,7,17) OK S01F1_0(18,7,18)->FPC00FE2(1,04) OK FPC05FE0(0,02)->S01F1_0(02,0,02) OK S01F1_0(02,1,02)->FPC05FE0(0,03) OK FPC05FE0(0,03)->S01F1_0(02,2,02) OK S01F1_0(02,3,02)->FPC05FE0(0,02) OK FPC05FE0(1,03)->S01F1_0(04,7,04) OK S01F1_0(03,6,03)->FPC05FE0(1,03) OK FPC05FE1(1,04)->S01F1_0(04,4,04) OK S01F1_0(03,4,03)->FPC05FE1(0,00) OK FPC05FE1(0,00)->S01F1_0(04,5,04) OK S01F1_0(03,5,03)->FPC05FE1(1,04) OK FPC05FE1(1,02)->S01F1_0(04,6,04) OK S01F1_0(03,7,03)->FPC05FE1(1,02) OK FPC05FE2(1,00)->S01F1_0(02,4,02) OK S01F1_0(02,5,02)->FPC05FE2(1,01) OK FPC05FE2(1,01)->S01F1_0(02,6,02) OK S01F1_0(02,7,02)->FPC05FE2(1,00) OK FPC05FE2(1,02)->S01F1_0(04,3,04) OK S01F1_0(04,2,04)->FPC05FE2(1,02) OK FPC05FE3(1,04)->S01F1_0(04,0,04) OK S01F1_0(04,0,04)->FPC05FE3(0,00) OK FPC05FE3(0,00)->S01F1_0(04,1,04) OK S01F1_0(04,1,04)->FPC05FE3(1,04) OK FPC05FE3(1,02)->S01F1_0(04,2,04) OK S01F1_0(04,3,04)->FPC05FE3(1,02) OK FPC05FE4(0,10)->S01F1_0(03,0,03) OK S01F1_0(03,1,03)->FPC05FE4(0,12) OK FPC05FE4(0,12)->S01F1_0(03,2,03) OK S01F1_0(03,3,03)->FPC05FE4(0,10) OK FPC05FE4(0,08)->S01F1_0(03,7,03) OK S01F1_0(04,6,04)->FPC05FE4(0,08) OK FPC05FE5(1,04)->S01F1_0(03,4,03) OK S01F1_0(04,4,04)->FPC05FE5(0,00) OK FPC05FE5(0,00)->S01F1_0(03,5,03) OK S01F1_0(04,5,04)->FPC05FE5(1,04) OK FPC05FE5(1,02)->S01F1_0(03,6,03) OK S01F1_0(04,7,04)->FPC05FE5(1,02) OK FPC06FE0(1,03)->S01F1_0(01,0,01) OK S01F1_0(00,3,00)->FPC06FE0(1,03) OK FPC06FE0(0,02)->S01F1_0(02,1,02) OK S01F1_0(01,0,01)->FPC06FE0(0,03) OK FPC06FE0(0,03)->S01F1_0(02,3,02) OK S01F1_0(01,2,01)->FPC06FE0(0,02) OK FPC06FE1(0,00)->S01F1_0(01,2,01) OK S01F1_0(00,1,00)->FPC06FE1(0,00) OK FPC06FE1(1,04)->S01F1_0(15,0,15) OK S01F1_0(01,5,01)->FPC06FE1(1,04) OK FPC06FE1(1,02)->S01F1_0(15,2,15) OK S01F1_0(01,7,01)->FPC06FE1(1,02) OK FPC06FE2(1,02)->S01F1_0(01,4,01) OK S01F1_0(00,7,00)->FPC06FE2(1,02) OK FPC06FE2(1,00)->S01F1_0(02,5,02) OK S01F1_0(01,4,01)->FPC06FE2(1,01) OK FPC06FE2(1,01)->S01F1_0(02,7,02) OK S01F1_0(01,6,01)->FPC06FE2(1,00) OK FPC06FE3(0,00)->S01F1_0(01,6,01) OK S01F1_0(00,5,00)->FPC06FE3(0,00) OK FPC06FE3(1,04)->S01F1_0(19,4,19) OK S01F1_0(02,4,02)->FPC06FE3(1,04) OK FPC06FE3(1,02)->S01F1_0(19,6,19) OK S01F1_0(02,6,02)->FPC06FE3(1,02) OK FPC06FE4(0,08)->S01F1_0(01,7,01) OK S01F1_0(01,3,01)->FPC06FE4(0,08) OK FPC06FE4(0,10)->S01F1_0(03,1,03) OK S01F1_0(02,0,02)->FPC06FE4(0,12) OK FPC06FE4(0,12)->S01F1_0(03,3,03) OK S01F1_0(02,2,02)->FPC06FE4(0,10) OK FPC06FE5(0,00)->S01F1_0(01,5,01) OK S01F1_0(01,1,01)->FPC06FE5(0,00) OK FPC06FE5(1,04)->S01F1_0(19,0,19) OK S01F1_0(03,0,03)->FPC06FE5(1,04) OK FPC06FE5(1,02)->S01F1_0(19,2,19) OK S01F1_0(03,2,03)->FPC06FE5(1,02) OK ... ... FPC15FE5(1,01)->S01F0_0(08,3,08) OK S01F0_0(07,3,07)->FPC06FE5(1,01) OK SIB 2 Not Online SIB 3 Not Online SIB 4 Not Online SIB 5 Not Online
show chassis fabric topology(QFX10008スイッチ)
user@host> show chassis fabric topology In-link : FPC# FE# ASIC# (TX inst#, TX sub-chnl #) -> SIB# ASIC#_FCORE# (RX port#, RX sub-chn#, RX inst#) Out-link : SIB# ASIC#_FCORE# (TX port#, TX sub-chn#, TX inst#) -> FPC# FE# ASIC# (RX inst#, RX sub-chnl #) SIB 0 FCHIP 0 FCORE 0 : ----------------------- In-links State Out-links State -------------------------------------------------------------------------------- FPC00FE0(1,17)->S00F0_0(01,0,01) OK S00F0_0(00,0,00)->FPC00FE0(1,09) OK FPC00FE0(1,09)->S00F0_0(02,0,02) OK S00F0_0(00,1,00)->FPC00FE0(1,17) OK FPC00FE0(1,07)->S00F0_0(02,2,02) OK S00F0_0(00,2,00)->FPC00FE0(1,07) OK FPC00FE1(1,12)->S00F0_0(01,1,01) OK S00F0_0(00,3,00)->FPC00FE1(1,06) OK FPC00FE1(1,06)->S00F0_0(01,2,01) OK S00F0_0(01,1,01)->FPC00FE1(1,12) OK FPC00FE1(1,10)->S00F0_0(01,3,01) OK S00F0_0(01,3,01)->FPC00FE1(1,10) OK FPC00FE2(1,16)->S00F0_0(00,4,00) OK S00F0_0(00,4,00)->FPC00FE2(1,08) OK FPC00FE2(1,08)->S00F0_0(01,6,01) OK S00F0_0(00,5,00)->FPC00FE2(1,16) OK FPC00FE2(1,06)->S00F0_0(01,7,01) OK S00F0_0(00,6,00)->FPC00FE2(1,06) OK SIB 0 FCHIP 1 FCORE 0 : ----------------------- In-links State Out-links State -------------------------------------------------------------------------------- FPC00FE0(1,15)->S00F1_0(15,4,15) OK S00F1_0(16,4,16)->FPC00FE0(1,15) OK FPC00FE0(1,11)->S00F1_0(17,4,17) OK S00F1_0(18,4,18)->FPC00FE0(1,11) OK FPC00FE0(1,13)->S00F1_0(17,6,17) OK S00F1_0(18,6,18)->FPC00FE0(1,13) OK FPC00FE1(1,08)->S00F1_0(15,6,15) OK S00F1_0(16,6,16)->FPC00FE1(1,08) OK FPC00FE1(1,14)->S00F1_0(17,5,17) OK S00F1_0(18,5,18)->FPC00FE1(1,14) OK FPC00FE1(1,16)->S00F1_0(17,7,17) OK S00F1_0(18,7,18)->FPC00FE1(1,16) OK FPC00FE2(1,14)->S00F1_0(16,0,16) OK S00F1_0(16,0,16)->FPC00FE2(1,14) OK FPC00FE2(1,10)->S00F1_0(18,0,18) OK S00F1_0(18,0,18)->FPC00FE2(1,10) OK FPC00FE2(1,12)->S00F1_0(18,2,18) OK S00F1_0(18,2,18)->FPC00FE2(1,12) OK SIB 1 Not Online SIB 2 Not Online SIB 3 Not Online SIB 4 Not Online SIB 5 Not Online
リリース情報
Junos OSリリース7.4より前に導入されたコマンド。
sfc
Junos OSリリース9.6のTX Matrix Plusルーターに導入されたオプション。