Powering on the LN2600 Router
The LN2600 router derives its power from a single -48 VDC power supply with dual power inputs.
The LN2600 router has more than one power source. Ensure proper care while connecting the DC power supply to the router.
You connect DC power to the router by attaching power cables from the external DC power sources to the terminal on the power supply ports. The power cables are not provided with the router.
To connect the DC source power cables to the router for each power supply:
- Power off the dedicated customer site circuit breakers. Ensure that the voltage across the DC power source cable leads is 0 V and that there is no chance that the cable leads might become active during installation.
- Attach an electrostatic discharge (ESD) grounding strap to your bare wrist, and connect the strap to one of the ESD points on the chassis.
- Verify that the DC power cables are correctly labeled
before making connections to the power supply. In a typical power
distribution scheme where the return is connected to chassis ground
at the battery plant, you can use a multimeter to verify the resistance
of the
48V
andRTN
cables to chassis ground:The cable with very large resistance (indicating an open circuit) to chassis ground is
–48V
.The cable with very low resistance (indicating a closed circuit) to chassis ground is
RTN
.
- Loosen the screws from the power terminals
using a 2.5 mm slotted screw driver.
Figure 1: Dual DC Power Source Caution You must ensure that power connections maintain the proper polarity. The power source cables might be labeled (+) and (–) to indicate their polarity. There is no standard color coding for DC power cables. The color coding used by the external DC power source at your site determines the color coding for the leads on the power cables that attach to the terminal studs on each power supply.
- Insert the power cables as specified to the
respective power terminals, and secure the cables with the screws.
Secure the positive (+) DC source power cable to the
RTN
(return) terminal.Secure the negative (–) DC source power cable to the
–48V
(input) terminal.
Caution Ensure that each power cable seats flush against the surface of the terminal block as you are tightening the screws. Ensure that each screw is properly threaded into the terminal. Applying installation torque to the screw when improperly threaded may result in damage to the terminal.
- Repeat Step 4 through Step 5 for the remaining power supply.
- Arrange the other end of the power cables in a single bundle, and pass them through the power cable entrance (see LN2600 Router Cable Management System).
- Power on the dedicated customer site circuit breakers.
- Monitor router startup on the console and the LED on the front panel of the LN2600 router to verify that the router is booting properly. For information on the LN2600 router status LED, see LN2600 Router Status LED.
As a standard part of the boot process, the router runs startup power-on self test (SPOST) and then power-on self test (POST) diagnostics.
A successful startup looks similar to the following example:
CPU Memory (Data32: 00000000-0007ffff) test completed, 1 pass, 0 errors CPU Memory (Data32: 0f000000-0fffffff) test completed, 1 pass, 0 errors CPU Memory (Addr32: 00000000-0007ffff) test completed, 1 pass, 0 errors CPU Memory (Addr32: 0f000000-0fffffff) test completed, 1 pass, 0 errors Boot Flash: 16 MB in 131 Sectors (portwidth: 16bit chipwidth: 16bit) OCTEON CN56XX pass 2.1, Core clock: 600 MHz, DDR clock: 266 MHz Initializing USB Device 1: Product DOTG Root Hub Initializing IDE Initializing FPGA Programming /cf/usr/share/pfe/firmware/563-029572.bit: 2067591 bytes Programmed successfully (time: 883966125 ticks) PCIe: Waiting for port 0 link PCIe: Port 0 link active, 1 lanes 0:00:00.0 0x003b1304 HWA FPGA Version 0x0011081200000055 PCIe: Waiting for port 1 link PCIe: Port 1 link active, 4 lanes 1:00:00.0 0x0009184e IDP Revision Date-Time: 05/28/08-18:00:00 Juniper LN2600 revision 1.3, Serial# 1R263360016* Juniper Part # 650-046793 Bootstrap: #1.6 Loader: #2.3 12.1X45-D10 2013-07-04 05:03:05 UTC builder@briath.juniper.net IPMC: 1.0.19 IPMC_RB: 1.0.19 SDRAM: 2048 MB Boot flash: 16 MB @ 0x1fc00000 IDE flash: 3.7 GB (7946064 x 512) USB: not available current_dev: ide coremask: 0xfff (12 cores) reset: Hard NVMRO: Write-enabled watchdog: Armed FPGA: Enabled Firmware Image Status: Primary Bootstrap: UP TO DATE Secondary Loader0: UP TO DATE Secondary Loader1: UP TO DATE IPMC Firmware: UP TO DATE IPMC_RB Firmware: UP TO DATE Hit any key to stop autoboot: 0 Checking firmware for updates... IPMC test IPMC test completed, 1 pass, 0 errors, 0 warnings ******************************** POST ******************************** CPU BIST test CPU BIST test completed, 1 pass, 0 errors, 0 warnings CPU Core (0ffe) test CPU Core (0ffe) test completed, 1 pass, 0 errors, 0 warnings CPU GPIO test *** Warning during CPU GPIO test, pass 1, NVMRO not asserted, verify error at location 0x8001070000000880, expected 0x0002, actual 0x0000, Slot 0 (Signal ref. des. NVMRO[A4]) CPU GPIO test completed, 1 pass, 0 errors, 1 warning CPU Memory (Post: 00080000-0effffff) test CPU Memory (Post: 00080000-0effffff) test completed, 1 pass, 0 errors, 0 warnings CPU Memory (Post: 20000000-7fffffff) test CPU Memory (Post: 20000000-7fffffff) test completed, 1 pass, 0 errors, 0 warnings CPU Memory (Post: c0000000-cfffffff) test CPU Memory (Post: c0000000-cfffffff) test completed, 1 pass, 0 errors, 0 warnings Juniper ID EEPROM test Juniper ID EEPROM test completed, 1 pass, 0 errors, 0 warnings SysFlash test SysFlash test completed, 1 pass, 0 errors, 0 warnings I2C Bus test I2C Bus test completed, 1 pass, 0 errors, 0 warnings PCIe Interface test PCIe Interface test completed, 1 pass, 0 errors, 0 warnings IDP Interface test IDP Interface test completed, 1 pass, 0 errors, 0 warnings HWA Memory (Short MemWalk: 00000000-04000000) test HWA Memory (Short MemWalk: 00000000-04000000) test completed, 1 pass, 0 errors, 0 warnings HWA Memory (Short MemAddr: 00000000-04000000) test HWA Memory (Short MemAddr: 00000000-04000000) test completed, 1 pass, 0 errors, 0 warnings HWA Packet test HWA Packet test completed, 1 pass, 0 errors, 0 warnings Sensor test Sensor test completed, 1 pass, 0 errors, 0 warnings Temp near FPGA | 29 degrees C | OK Temp near NPU | 25 degrees C | OK Temp near SFP3 | 23 degrees C | OK Temp near SFP0 | 25 degrees C | OK FPGA +3.3V | 3294 millivolts | OK VDD +3.3V | 3294 millivolts | OK 0.9V OK | 0 | Asserted 1.8V OK | 0 | Asserted 1.2V OK | 0 | Asserted 1.1V OK | 0 | Asserted 1.0V OK | 0 | Asserted NPU Tj | disabled | NS NPU Tj: / 34C IPMC test IPMC test completed, 1 pass, 0 errors, 0 warnings Booting... Booting /kernel ...
For normal operation, allow the autoboot to proceed. Do not press any key when you get the Hit any key to stop autoboot: message.
Full POST diagnostics then run, and the system starts Junos OS normally. If detailed diagnostics must be run, or if alternate media (for example, a USB storage device) must be booted, press any key before or during the 1-second countdown. The following bootstrap prompt is displayed:
BOOT>
If POST diagnostics or the bootstrap sequence fails, the bootstrap prompt is displayed again, and the front panel LED lights turn red.