Powering On the LN1000 Mobile Secure Router

The LN1000 router derives its power from the chassis in which it is installed; it automatically powers on when inserted into the connector in the VITA 46.0-compliant chassis.

Monitor router startup on the console and the LED on the front panel of the LN1000 router to verify that the router is booting properly.

As a standard part of the boot process, the router runs startup power-on self test (SPOST) and then power-on self test (POST) diagnostics. A successful startup looks similar to the following example:

CPU Memory (Data32: 00000000-0007ffff) test completed, 1 pass, 0 errors 
CPU Memory (Data32: 0f000000-0fffffff) test completed, 1 pass, 0 errors 
CPU Memory (Addr32: 00000000-0007ffff) test completed, 1 pass, 0 errors 
CPU Memory (Addr32: 0f000000-0fffffff) test completed, 1 pass, 0 errors

Boot Flash: 16 MB in 131 Sectors (portwidth: 16bit  chipwidth: 16bit) 
OCTEON CN56XX pass 2.0, Core clock: 600 MHz, DDR clock: 266 MHz



Initializing USB
Device 1:
  Product      DOTG Root Hub
Device 2:
  Manufacturer         
  Product      USB Flash Memory
  SerialNumber 00147808E485C92043770566

Initializing IDE

Initializing FPGA
Programming /cf/usr/share/pfe/firmware/563-029572.bit: 2067590 bytes 
Programmed successfully (time: 883475051 ticks) 
Checking for init_data 
No init_data
PCIe: Waiting for port 0 link
PCIe: Port 0 link active, 1 lanes
Probing PCIe port 0
0:00:00.0 0x003b1304
PCIe port 0 had 1 busses
HWA FPGA Version 0x0004090900000013
PCIe: Waiting for port 1 link
PCIe: Port 1 link active, 4 lanes
Probing PCIe port 1
1:00:00.0 0x0009184e
PCIe port 1 had 1 busses
IDP Revision Date-Time: 05/28/08-18:00:00 
Enumeration took 0 reboots


Juniper LN1000-V revision 2.0, Serial# ************ 
Juniper Part # 710-027379 Bootstrap version 10.0I

Build:       10.0B3.7 #0: 2009-09-25 16:36:56 UTC
                builder@ormonth.juniper.net

SDRAM:       1024 MB
Boot flash:  16 MB @ 0x1fc00000
IDE flash:   977.4 MB (2001888 x 512)
USB:         1.8 GB (3911616 x 512)
current_dev: ide
coremask:    0xfff (12 cores)
resetmask:   0xffe (1 cores running)
reset:       Hard
NVMRO:       Write-enabled
watchdog:    Armed
FPGA:        Enabled

Hit any key to stop autoboot: 10
 IPMC test
 IPMC test completed, 1 pass, 0 errors, 0 warnings

BOOT > 

For normal operation, allow the autoboot to proceed. Full POST diagnostics then run, and the system starts Junos OS normally. If detailed diagnostics must be run, or if alternate media (for example, a USB storage device) must be booted, press ENTER during the 10-second count-down. The following bootstrap prompt is displayed:

BOOT>

If POST diagnostics or the bootstrap sequence fails, this prompt is redisplayed, and the front panel LED lights red.

You are now ready to configure and operate the router.

Related Documentation