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Home > Support > Technical Documentation > JunosE Software > Scenarios for the Detection of Corruption in the FPGA Statistics and the Determination of the Threshold
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Related Documentation

  • Detection of Corruption in the FPGA Statistics for Policies of Subscribers Managed by the SRC Software
  • Computation of the Interface and Policy Counters for the Detection of Corruption in the FPGA Statistics
  • Example: Computation of the Threshold Value by Using Interface and Policy Counters for the Detection of Corruption in the FPGA Statistics
  • Configuring the Capability to Detect Corruption in the FPGA Statistics for Policies Managed by the SRC Software
  • Monitoring the Detection of Corrupted FPGA Statistics Settings
 

Scenarios for the Detection of Corruption in the FPGA Statistics and the Determination of the Threshold

This section describes scenarios for the detection of corruption in the FPGA statistics and the determination of the threshold:

  • When a bit flip occurs in policy counters
  • When a bit flip occurs in interface counters
  • When a policy is reattached to an interface
  • When a bit flip occurs when a policy is attached to an interface for the first time

Bit Flip in Policy Counters

When a bit flip occurs in policy counters, the sum of the policy counters in different classifier groups is larger than the interface counter value. If the difference is greater than or equal to the configured threshold value, corruption in the FPGA statistics is detected.

Table 1: Interface and Policy Statistics When a Bit Flip Occurs in Policy Counters

Interval

Interface Counter

Policy Sum

Policy counter1

Policy counter2

Initial

0

0

0

0

Interval 1

1100

1100

100

1100

Interval 2

2200

1,000,002,200

1,000,000,200

2000

Bit Flip in Interface Counters

When a bit flip occurs in interface counters, the interface counter value is larger than the sum of the policy counters in different classifier groups. If the difference is greater than or equal to the configured threshold value, corruption in the FPGA statistics is detected.

Table 2: Interface and Policy Statistics When a Bit Flip Occurs in Interface Counters

Interval

Interface counter

Policy Sum

Policy counter1

Policy counter2

Initial

0

0

0

0

Interval 1

1100

1100

100

1000

Interval 2

1,000,002,200

2200

200

2000

Reattachment of a Policy to an Interface

Consider a scenario in which a policy is reapplied to an interface either because of a fast or a full resynchronization of the SRC server or because of a previously attached policy being removed and reapplied to the interface. In this case, the policy counters are reinitialized to 0, and the sum of policy counters in different classifier groups is less than the interface counters. If the difference is greater than or equal to the configured threshold value, corruption in the FPGA statistics is detected.

Table 3: Interface and Policy Statistics When a Policy is Reapplied to an Interface

Interval

Interface Counter

Policy Sum

Policy counter1

Policy counter2

Initial

0

0

0

0

Interval 1

1100

1100

100

1000

Interval 2

2200

0

0

0

Interval 3

3300

1100

100

1000

Bit Flip in Policy Counters When a Policy is Attached to an Interface for the First Time

In this scenario, a bit flip occurs in the policy statistical counter at the time of attachment of a policy to an interface. In such scenarios, the policy counters are larger than the interface counters even when the policy is applied for the first time. If the difference between policy and interface counters over polling intervals is greater than or equal to the configured threshold value, corruption in the FPGA statistics is detected.

Table 4: Interface and Policy Statistics When a Bit Flip Occurs when a Policy is Attached to an Interface for the First Time

Interval

Interface Counter

Policy Sum

Policy counter1

Policy counter2

Initial

0

1,000,000,000

1,000,000,000

0

Interval 2

1,100

1,000,001,100

1,000,000,100

1000

Interval 3

2200

1,000,002,200

1,000,000,200

2000

 

Related Documentation

  • Detection of Corruption in the FPGA Statistics for Policies of Subscribers Managed by the SRC Software
  • Computation of the Interface and Policy Counters for the Detection of Corruption in the FPGA Statistics
  • Example: Computation of the Threshold Value by Using Interface and Policy Counters for the Detection of Corruption in the FPGA Statistics
  • Configuring the Capability to Detect Corruption in the FPGA Statistics for Policies Managed by the SRC Software
  • Monitoring the Detection of Corrupted FPGA Statistics Settings
 

Published: 2012-07-03

 
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