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E3 IQ PIC

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Software release
  • JUNOS 6.1 and later
Description
  • Four E3 ports
  • Power requirement: 0.38 A/48 V @ 18 W
  • Intelligent queuing (IQ) PICs support fine-grained queuing per logical interface.

Note: On the M5, M10, M20, M40, and M160 routers, this PIC requires an Enhanced FPC. See the hardware guide for your router for more information.

Hardware features
  • Clear-channel (34.368-Mbps) and subrate E3
  • Unframed or ITU G.751 framing
  • Data Service Unit (DSU) functionality
  • Subrate and scrambling:
    • Digital Link/Quick Eagle
    • Kentrox
  • HDB3 line encoding
  • Full Bit Error Rate Testing (BERT)
  • Local and remote loopback testing
Software features
  • Quality of Service (QoS) per port: Weighted Round Robin (WRR), Random Early Drop (RED), Weighted Random Early Drop (WRED)
  • Simple Network Management Protocol (SNMP): E3 MIB, QoS MIB
  • Input policing and output shaping
  • Provider-side rate limiting
  • Full data link connection identifier (DLCI) range with sparse channel numbering
  • Per-DLCI queues with weighted deficit round robin and strict priority
  • Encapsulations:
    • High-level Data Link Control (HDLC)
    • Frame Relay
    • Multiprotocol Label Switching (MPLS) circuit cross-connect (CCC)
    • MPLS translational cross-connect (TCC)
    • Point-to-Point Protocol (PPP)

Note: Extended support for graceful Routing Engine switchover (GRES) has been added for this PIC. To configure GRES, you must be running JUNOS release 7.3 or later.

Cables and connectors
  • Standard E3 BNC coaxial cable interfaces
LEDs One tricolor per port:
  • Off—Not enabled
  • Green—Online with no alarms or failures
  • Amber—Online with alarms for remote failures
  • Red—Active with a local alarm; router has detected a failure
Alarms, errors, and events
  • Alarm Indication Signal (AIS)
  • Equipment failure (does not affect service)
  • Frame error
  • Line code violation
  • Loss of Signal (LOS)
  • Out of Frame (OOF)
  • Yellow alarm bit (A-bit) disagreements
Instrumentation (counters)
  • Layer 2 per-queue packet and byte counters

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