Description | - One OC48 port
- Power requirement: 0.41 A @ 48 V ( 20 W)
- Fine-grained queuing per logical interface
- Conforms to ANSI T1.105-1991 and T1E1.2/93-020R1
- Complies with ATM and SONET/SDH standards
- Alarm and event counting and detection
- Compatible with well-known ATM switches
- ATM switch ID, which displays the switch IP address and
local interface name of the adjacent Fore ATM switches
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Hardware features | - ATM2 IQ 1-port OC48 PICs have one 3010 SAR for segmentation
and reassembly into 53-byte ATM cells.
- High-performance parsing of SONET/SDH frames
- ASIC-based packet segmentation and reassembly (SAR) management
and output port queuing
- 64-MB SDRAM memory for ATM SAR
- Packet buffering, Layer 2 parsing
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Software features | - Multiprotocol Label Switching (MPLS) circuit cross-connect
for leveraging ATM access networks
- User-configurable virtual circuit (VC) and virtual path
(VP) support
- Support for idle cell or unassigned cell transmission
- OAM fault management processes alarm indication signal
(AIS), remote defect indication (RDI), and loop cells
- Point-to-point and point-to-multipoint mode Layer 2 counters
per VC and per VP
- Local and remote loopback
- ATM Inverse ARP, which enables routers to automatically
learn the IP address of the router on the far end of an ATM PVC
- Simple Network Management Protocol (SNMP):
- Management Information Base (MIB) 2 (RFC 1213)
- ATM MIB (RFC 1695)
- SONET MIB
- Unspecified bit rate (UBR), non-real-time variable bit
rate (VBR), and constant bit rate (CBR) traffic shaping
- Per-VC or per-VP traffic shaping
- Support for F4 OAM cells
- Support for 16-bit VCI range
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Cables and connectors | |
LEDs | One tricolor per port: - Off—Not enabled
- Green—Online with no alarms or failures
- Yellow—Online with alarms for remote failures
- Red—Active with a local alarm; router has detected
a failure
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Alarms, errors, and events | - Alarm indication signal—line (AIS-L)
- Alarm indication signal—path (AIS-P)
- Bit error rate—signal degrade (BERR-SD)
- Bit error rate— signal fail (BERR-SF)
- Loss of cell delineation (LOC)
- Loss of frame (LOF)
- Loss of pointer (LOP-P)
- Loss of signal (LOS)
- Payload mismatch (PLM-P)
- Payload unequipped (unequipped STS at path level) (UNEQ-P)
- Remote defect indication—line (RDI-L)
- Remote defect indication—path (RDI-P)
Error detection: - Bit interleaved parity errors B1, B2, B3
- Errored seconds (ES-S, ES-L, ES-P)
- Far-end bit errors, remote error indication—line
(REI-L), far-end line coding violations (CV-LFE)
- Far-end bit errors, remote error indication—path
(REI-P), far-end path coding violations (CV-PFE)
- Far-end errored seconds (ES-LFE, ES-PFE)
- Far-end severely errored seconds (SES-LFE, SES-PFE)
- Far-end unavailable seconds (UAS-LFE, UAS-PFE)
- Severely errored frames (SEF)
- Severely errored framing seconds (SEFS-S)
- Severely errored seconds (SES-S, SES-L, SES-P)
- Unavailable seconds (UAS-L, UAS-P)
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