T320 Packet Forwarding Engine Architecture
7/2010 Do not use this topic. A new topic for M320 and T-series was created. See 50071. egThe Packet Forwarding Engines provide the Layer 2 and Layer 3 packet switching, forwarding, and route lookup functions. The Packet Forwarding Engines are implemented in ASICs that are physically located on the FPCs and the PICs.
Each Packet Forwarding Engine consists of the following components (see Data Flow Through the T320 Router):
- Layer 2/Layer 3 Packet Processing ASIC, which performs Layer 2 and Layer 3 encapsulation and decapsulation, and manages the division and reassembly of packets within the router.
- Queuing and Memory Interface ASICs, which manage the buffering of data cells in memory and the queueing of notifications.
- T Series Internet Processor, which provides the route lookup function.
- Switch Interface ASICs, which extract the route lookup key and manage the flow of data cells across the switch fabric.
- Media-specific ASICs on the PICs that perform control functions tailored to the PIC media types.
