Configuring CoS on Ethernet IQ2 and Enhanced IQ2 PICs
This topic discusses the following:
- CoS on Enhanced IQ2 PICs Overview
- Setting the Number of Egress Queues on IQ2 and Enhanced IQ2 PICs
- Configuring Rate Limits on IQ2 and Enhanced IQ2 PICs
- Configuring Shaping on 10-Gigabit Ethernet IQ2 PICs
- Shaping Granularity Values for Enhanced Queuing Hardware
- Differences Between Gigabit Ethernet IQ and Gigabit Ethernet IQ2 PICs
- Configuring Traffic Control Profiles for Shared Scheduling and Shaping
- Differences Between Gigabit Ethernet IQ and Gigabit Ethernet IQ2 PICs
- Configuring a Separate Input Scheduler for Each Interface
- Configuring Per-Unit Scheduling for GRE Tunnels Using IQ2 and IQ2E PICs
- Configuring Hierarchical Input Shapers
- Example: Configuring a CIR and a PIR on Ethernet IQ2 Interfaces
- Example: Configuring Shared Resources on Ethernet IQ2 Interfaces
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