Configuring ATM Interfaces
- ATM Interfaces Overview
- ATM1 Physical and Logical Configuration Statement Hierarchies
- ATM2 IQ Physical and Logical Configuration Statement Hierarchies
- Supported Features on ATM1 and ATM2 IQ Interfaces
- Configuring Communication with Directly Attached ATM Switches and Routers
- Enabling ILMI for Cell Relay
- Enabling Passive Monitoring on ATM Interfaces
- Removing MPLS Labels from Incoming Packets
- Configuring the ATM PIC Type
- Configuring ATM Cell-Relay Promiscuous Mode
- Configuring the Maximum Number of ATM1 VCs on a VP
- Configuring Layer 2 Circuit Transport Mode
- Configuring Layer 2 Circuit Cell-Relay Promiscuous Mode
- Configuring Layer 2 Circuit Trunk Mode Scheduling
- Configuring CoS Queues in Layer 2 Circuit Trunk Mode
- Configuring the Layer 2 Circuit Cell-Relay Cell Maximum
- Configuring the OAM F4 Cell Flows
- Defining Virtual Path Tunnels
- Configuring a Point-to-Point ATM1 or ATM2 IQ Connection
- Configuring a Point-to-Multipoint ATM1 or ATM2 IQ Connection
- Configuring a Multicast-Capable ATM1 or ATM2 IQ Connection
- Configuring Inverse ATM1 or ATM2 ARP
- Defining the ATM Traffic-Shaping Profile
- Configuring the ATM1 Queue Length
- Configuring the ATM2 IQ EPD Threshold
- Configuring Two EPD Thresholds per Queue
- Configuring the ATM2 IQ Transmission Weight
- Defining the ATM OAM F5 Loopback Cell Period
- Configuring the ATM OAM F5 Loopback Cell Threshold
- Configuring ATM Interface Encapsulation
- Configuring an ATM1 Cell-Relay Circuit
- Configuring PPP over ATM2 Encapsulation
- Configuring E3 and T3 Parameters on ATM Interfaces
- Configuring SONET/SDH Parameters on ATM Interfaces
- Configuring ATM2 IQ VC Tunnel CoS Components
- Example: Configuring ATM1 Interfaces
- Example: Configuring ATM2 IQ Interfaces
