By default, T1, E1, and NxDS0 interfaces configured on Channelized IQ PICs are limited to 100,000 microseconds of delay buffer. (The default average packet size on the IQ PIC is 40 bytes.) For these interfaces, it might be necessary to configure a larger buffer size to prevent congestion and packet dropping.
To ensure traffic is queued and transmitted properly, you can configure a buffer size larger than the default maximum. Include the q-pic-large-buffer large-scale statement at the [edit chassis fpc slot-number pic pic-number] hierarchy level:
- [edit chassis fpc slot-number pic pic-number]
-
q-pic-large-buffer {
- large-scale;
- }
This statement sets the maximum buffer size. (See Table 57.)
Table 57: Maximum Delay Buffer with q-pic-large-buffer Statement Enabled
For information on configuring the buffer size, see the JUNOS Class of Service Configuration Guide.