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Configuring Channelized OC12 Interfaces

On Channelized OC12 PICs, you can configure 12 T3 channels per port. To configure channelized OC12 interface properties, you can include the sonet-options and t3-options statements at the [edit interfaces interface-name] hierarchy level. Some SONET/SDH options are ignored, and some can only be configured for channel 0, though they apply equally to all channels. The long-buildout statement under t3-options is also ignored.

For T3 channels on a channelized OC12 interface, the clocking statement is supported only for channel 0; it is ignored if included in the configuration of channels 1 through 11. The clock source configured for channel 0 applies to all channels on the channelized OC12 interface. The individual T3 channels use a gapped 45-MHz clock as the transmit clock. When you configure the clock source for a channelized interface—ds-fpc/pic/port :0, for example—you must also include the channel-group statement at the [edit chassis] hierarchy level and specify channel group 0. For more information, see Clock Sources on Channelized Interfaces.

For more information, see Configuring SONET/SDH Interfaces and Configuring T3 Interfaces. For a configuration example, see Configuring Aggregated SONET/SDH Interfaces.

Table 41 summarizes the OC12-to-DS3 numbering scheme.

Table 41: OC12-to-DS3 Numbering Scheme

Two-Level STS-1 Number (STS-3,STS-1)

One-Level STS Number

OC12-to-DS3 PIC DS3 Number

1,1

1

0

1,2

2

1

1,3

3

2

2,1

4

3

2,2

5

4

2,3

6

5

3,1

7

6

3,2

8

7

3,3

9

8

4,1

10

9

4,2

11

10

4,3

12

11


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