Configuring Channelized E1 Interfaces

By default, all the time slots on a channelized E1 interface are used. There can be a maximum of 24 channel groups per channelized E1 interface. Thus, you can configure a maximum of 240 channel groups per PIC.

To specify the DS0 channel group number in the interface name, include a colon (:) as a separator. For example, a Channelized E1 PIC might have the following physical and virtual interfaces:

x is a DS0 channel group from 0 through 23 (for more information about ranges, see Table 40).

You can use any of the values within the range available for x; you do not have to configure the links sequentially. In addition, the JUNOS software applies the interface options you configure according to the following rules:

• To configure the e1-options statement, you must set channel group x to 0:

  ds-0/0/0:0

• There are no restrictions on configuring the ds0-options statement.
• If you delete a configuration you previously committed for channel group 0, the options return to default values.

To configure the channel groups and time slots for a channelized E1 interface, include the following statements at the [edit chassis] hierarchy level:

Note: If you commit the interface name but do not include the [edit chassis] configuration, the Channelized E1 PIC behaves like a standard E1 PIC, and none of the DS0 functionality is accessible.

There are 32 time slots on an E1 interface; however, time slot 0 is reserved. You can designate any combination of time slots. To configure ranges, use hyphens. To configure discontinuous time slots, use commas. Do not include spaces.

Table 40 shows the ranges you can specify.

Table 40: Ranges for Channelized E1 Configuration

The theoretical maximum number of channel groups possible per PIC is 10 * 24 = 240. This is within the maximum bandwidth available.

Note: NxDS0 time slots configured on either a channelized STM1 IQ interface or channelized E1 IQ interface are numbered from 1 to 31 (0 is reserved), while fractional E1 time slots range from 2 to 32 (1 is reserved). FPC slot range depends on the routing platform. For the TX Matrix platform, the range is from 0 through 31. For M40, M40e, M160, M320, M120, and other T-series routing platforms, the range is from 0 through 7. For M20 routing platforms, the range is from 0 through 3. For M10 and M10i routing platforms the range is from 0 through 1. For M5 and M7i routing platforms, the only applicable value is 0.

Configuring Channelized E1 Interface Properties

To configure channelized E1 interface properties, include the e1-options statement at the [edit interfaces interface-name] hierarchy level:

To specify options for each of the DS0 channels, include the ds0-options statement at the [edit interfaces interface-name] hierarchy level:

For DS0 channels on a channelized E1 interface, the clocking statement is supported only for channel 0; it is ignored if included in the configuration of channels 1 through 11. The clock source configured for channel 0 applies to all channels on the channelized E1 interface. The individual DS0 channels use a gapped 45-MHz clock as the transmit clock. When you configure the clock source for a channelized interface—ds-fpc/pic/port:0, for example—you must also include the channel-group statement at the [edit chassis] hierarchy level, and specify channel group 0. For more information, see Clock Sources on Channelized Interfaces.

Only a subset of the E1 options is valid for the channelized configuration; you specify the time slots using the [edit chassis] configuration described in Examples: Interface Naming. For more information about the E1 and DS0 options, see Configuring E1 Interfaces and Configuring T1 Interfaces.

Each E1 interface has 32 time slots (DS0s), in which time slot 0 is reserved. You can combine one or more of these DS0 time slots (channels) to create a channel group (NxDS0). There can be a maximum of 24 channel groups per E1 interface.

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