List of Tables

Table 1: Notice Icons

Table 2: Text and Syntax Conventions

Table 3: Technical Documentation for Supported Routing Platforms

Table 4: JUNOS Software Network Operations Guides

Table 5: JUNOS Software for J-series Services Routers and SRX-series Services Gateways Documentation

Table 6: Additional Books Available Through http://www.juniper.net/books

Table 7: CoS Mappings—Inputs and Outputs

Table 8: Default VPLS Classifiers

Table 9: CoS Hardware Capabilities and Limitations

Table 10: Drop Priority Classification for Packet Sent from Enhanced III to Enhanced II FPC on M320

Table 11: Drop Priority Classification for Packet Sent from Enhanced II FPC Without Tricolor Marking to Enhanced III FPC on M320

Table 12: Drop Priority Classification for Packet Sent from Enhanced II FPC with Tricolor Marking to Enhanced III FPC on M320

Table 13: Routing Engine Protocol Queue Assignments

Table 14: CoS Features of PIC Families Compared

Table 15: Scheduling on PIC Families Compared

Table 16: Schedulers on PIC Families Compared

Table 17: Queue Parameters on PIC Families Compared

Table 18: Default CoS Values

Table 19: Default IP Precedence Classifier

Table 20: Default MPLS Classifier

Table 21: Default DSCP Classifier

Table 22: Default IEEE 802.1p Classifier

Table 23: Default IEEE 802.1ad Classifier

Table 24: Default IP Precedence (ipprec-default) Classifier

Table 25: Logical Interface Classifier Combinations by Platform

Table 26: Default MPLS EXP Classification Table

Table 27: Default Forwarding Classes

Table 28: Sample Forwarding Class-to-Queue Mapping

Table 29: Buffer Size Temporal Value Ranges by Platform Type

Table 30: Recommended Delay Buffer Sizes

Table 31: Maximum Delay Buffer with q-pic-large-buffer Enabled by Interface

Table 32: Delay-Buffer Calculations

Table 33: NxDSO Transmission Rates and Delay Buffers

Table 34: Scheduling Priority Mappings by FPC Type

Table 35: Shaping Rate and WRR Calculations by PIC Type

Table 36: Transmission Scheduling Support by Interfaces Type

Table 37: Bandwidth and Delay Buffer Allocations by Configuration Scenario

Table 38: Bandwidth and Delay Buffer Allocations by Configuration Scenario

Table 39: Scheduler Allocation for an Ethernet IQ2 PIC

Table 40: RTT Delay Buffers for IQ2 PICs

Table 41: TCM Platform Interoperation

Table 42: Color-Blind Mode TCM Color-to-PLP Mapping

Table 43: Color-Aware Mode TCM PLP Mapping

Table 44: Color-Blind Mode TCM Color-to-PLP Mapping

Table 45: Color-Aware Mode TCM Mapping

Table 46: Tricolor Marking Policer Statements

Table 47: Default Packet Header Rewrite Mappings

Table 48: Default MPLS EXP Rewrite Table

Table 49: Hierarchical Scheduler Nodes

Table 50: Queue Priority

Table 51: Internal Node Queue Priority for CIR Mode

Table 52: Internal Node Queue Priority for PIR-Only Mode

Table 53: IQ2 PIC and Enhanced Queuing DPC Compared

Table 54: Shaper Accuracy of 1-Gbps Ethernet at the Logical Interface Level

Table 55: Shaper Accuracy of 10-Gbps Ethernet at the Logical Interface Level

Table 56: Shaper Accuracy of 1-Gbps Ethernet at the Interface Set Level

Table 57: Shaper Accuracy of 10-Gbps Ethernet at the Interface Set Level

Table 58: Shaper Accuracy of 1-Gbps Ethernet at the Physical Port Level

Table 59: Shaper Accuracy of 10-Gbps Ethernet at the Physical Port Level

Table 60: JUNOS Priorities Mapped to Enhanced Queuing DPC Hardware Priorities

Table 61: Shaping Rates and WFQ Weights

Table 62: Example Shaping Rates and WFQ Weights

Table 63: Rounding Configured Weights to Hardware Weights

Table 64: Allocating Weights with PIR and CIR on Logical Interfaces

Table 65: Sharing Bandwidth Among Logical Interfaces

Table 66: First Example of Bandwidth Sharing

Table 67: Second Example of Bandwidth Sharing

Table 68: Final Example of Bandwidth Sharing

Table 69: Default Handling of Excess Traffic

Table 70: Basic Example of Excess Bandwidth

Table 71: Hardware Use of Basic Example Parameters

Table 72: Default Mode Example for IQE PICs

Table 73: Undersubscribed PIR Mode Example for IQE PICs

Table 74: Oversubscribed PIR Mode Example for IQE PICs

Table 75: CIR Mode Example for IQE PICs

Table 76: Excess Rate Mode Example for IQE PICs

Table 77: Default Queue Rates on the IQE PIC

Table 78: PIR Mode, with No Excess Configuration

Table 79: PIR Mode, with No Excess Hardware Behavior

Table 80: PIR Mode with Transmit Rate Configuration

Table 81: PIR Mode with Transmit Rate Hardware Behavior

Table 82: Second PIR Mode with Transmit Rate Configuration Example

Table 83: Second PIR Mode with Transmit Rate Hardware Behavior Example

Table 84: PIR Mode with Transmit Rate and Excess Rate Configuration

Table 85: PIR Mode with Transmit Rate and Excess Rate Hardware Behavior

Table 86: Excess Rate Configuration

Table 87: Excess Rate Hardware Behavior

Table 88: PIR Mode Generating Error Condition

Table 89: PIR Mode Generating Error Condition Behavior

Table 90: CIR Mode with No Excess Rate Configuration

Table 91: CIR Mode with No Excess Rate Hardware Behavior

Table 92: CIR Mode with Some Shaping Rates and No Excess Rate Configuration

Table 93: CIR Mode with Some Shaping Rates and No Excess Rate Hardware Behavior

Table 94: CIR Mode with Shaping Rates and Transmit Rates and No Excess Rate Configuration

Table 95: CIR Mode with Shaping Rates and Transmit Rates and No Excess Rate Hardware Behavior

Table 96: CIR Mode with Shaping Rates Greater Than Logical Interface Shaping Rate Configuration

Table 97: CIR Mode with Shaping Rates Greater Than Logical Interface Shaping Rate Hardware Behavior

Table 98: CIR Mode with Excess Rate Configuration

Table 99: CIR Mode with Excess Rate Hardware Behavior

Table 100: Oversubscribed PIR Mode with Transmit Rate Configuration

Table 101: Oversubscribed PIR Mode with Transmit Rate Hardware Behavior

Table 102: Oversubscribed PIR Mode with Transmit Rate and Excess Rate Configuration

Table 103: Oversubscribed PIR Mode with Transmit Rate and Excess Rate Hardware Behavior

Table 104: CIR Mode with Transmit Rate and Excess Rate Configuration

Table 105: CIR Mode with Transmit Rate and Excess Rate Hardware Behavior

Table 106: Excess Priority Configuration

Table 107: LSR Default Classification

Copyright © 2009, Juniper Networks, Inc. All rights reserved. Trademark Notice.