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Inverting the Serial Interface Transmit Clock

When an externally timed clocking mode (DCE or loop) is used, long cables might introduce a phase shift of the DTE-transmitted clock and data. At high speeds, this phase shift might cause errors. Inverting the transmit clock corrects the phase shift, thereby reducing error rates.

By default, the transmit clock is not inverted. To invert the transmit clock, include the transmit-clock invert statement:




transmit-clock invert;

You can include the transmit-clock statement at the following hierarchy levels:

[edit interfaces se-pim/0/port serial-options]
[edit interfaces se-fpc/pic/port serial-options]

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