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Configuring ATM2 IQ VC Tunnel CoS Components

The ATM2 IQ interface allows multiple IP queues into each VC. On M-series platforms (except the M320 and M120 router), a VC tunnel can support four CoS queues. On the M320, M120, and T-series platforms for all ATM2 IQ PICs except the OC48 PIC, a VC tunnel can support eight CoS queues. Within a VC tunnel, the WRR algorithm schedules the cell transmission of each queue. You can configure the queue admission policies, such as EPD or WRED, to control the queue size during congestion.

For information about CoS components that apply generally to all interfaces, see the JUNOS Class of Service Configuration Guide.

To configure ATM2 IQ VC tunnel CoS components, include the following statements at the [edit interfaces at-fpc/pic/port] hierarchy level:



[edit chassis fpc slot-number pic pic-number]
max-queues-per-interface number;
[edit interfaces at-fpc/pic/port]
atm-options {



linear-red-profiles profile-name {

high-plp-max-threshold percent;

low-plp-max-threshold percent;

queue-depth cells high-plp-threshold percent low-plp-threshold percent;
}



plp-to-clp;



scheduler-maps map-name {



forwarding-class class-name {

epd-threshold cells plp1 cells;

linear-red-profile profile-name;

priority (high | low);

transmit-weight (cells number | percent number);
}



vc-cos-mode (alternate | strict);
}


}
unit 0 {

atm-scheduler-map (map-name | default);


family family {


address address {
destination address;
}


}



plp-to-clp;



shaping {
(cbr rate | rtvbr peak rate sustained rate burst length | vbr peak rate sustained rate burst length);
}



vci vpi-identifier.vci-identifier;
}

This section contains the following topics:

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