ifIn1SecRates

ifJnxEntry 1

The number of bits per second delivered by this sublayer to its next higher sublayer.

ifIn1SecOctets

ifJnxEntry 2

The number of octets per second delivered by this sublayer to its next higher sublayer.

ifIn1SecPkts

ifJnxEntry 3

The number of packets per second delivered by this sublayer to its next higher sublayer.

ifOut1SecRate

ifJnxEntry 4

The number of bits per second delivered by this sublayer to its next lower sublayer.

ifOut1SecOctets

ifJnxEntry 5

The number of octets per second delivered by this sublayer to its next lower sublayer.

ifOut1SecPkts

ifJnxEntry 6

The number of packets per second delivered by this sublayer to its next lower sublayer.

ifHCIn1SecRate

ifJnxEntry 7

The number of bits per second delivered by this sublayer to its next higher sublayer. This object is a 64-bit version of ifIn1SecRate.

ifHCOut1SecRate

ifJnxEntry 8

The number of bits per second delivered by this sublayer to its next lower sublayers. This object is a 64-bit version of ifOut1SecRate.

ifJnxInErrors

ifJnxEntry 9

Errors: The sum of the incoming frame aborts and FCS errors.

ifJnxInFrameErrors

ifJnxEntry 10

Framing Errors: The number of input packets that were misaligned.

ifJnxInQDrops

ifJnxEntry 11

Drops: The number of packets dropped by the input queue of the I/O Manager ASIC.

ifJnxInRunts

ifJnxEntry 12

Runts: Frames received that are smaller than the runt threshold.

ifJnxInGiants

ifJnxEntry 13

Giants: Frames received that are larger than the giant threshold.

ifJnxInDiscards

ifJnxEntry 14

Policed discards: Frames that the incoming packet match code discarded because they were not recognized or of interest.

ifJnxInHslCrcErrors

ifJnxEntry 15

HS link CRC errors: The number of CRC errors on the high-speed links between the ASICs responsible for handling the router interfaces while receiving packets.

ifJnxInHslFifoOverFlows

ifJnxEntry 16

HS link FIFO overflows: The number of FIFO overflows on the high-speed links between the ASICs responsible for handling the router interfaces.

ifJnxInL3Incompletes

ifJnxEntry 17

L3 incompletes: The number of incoming packets that fail Layer 3 sanity checks of the header.

ifJnxInL2ChanErrors

ifJnxEntry 18

L2 channel errors: The number of incoming packets for which the software could not find a valid logical interface.

ifJnxInL2MismatchTimeouts

ifJnxEntry 19

L2 mismatch timeouts: The count of malformed or short packets that cause the incoming packet handler to discard the frame as unreadable.

ifJnxInInvalidVCs

ifJnxEntry 20

Invalid VCs: The number of cells that arrived for a nonexistent virtual circuit

ifJnxInFifoErrors

ifJnxEntry 21

FIFO errors: The number of FIFO errors in the received direction as reported by the ASIC on the PIC.

ifJnxBucketDrops

ifJnxEntry 22

Bucket drops: Drops because traffic load exceeded the interface transmit and receive leaky bucket configuration.

ifJnxSramErrors

ifJnxEntry 23

SRAM errors: This counter increments when a hardware error has occurred in the SRAM on the PIC.

ifJnxOutErrors

ifJnxEntry 24

Errors: The sum of the outgoing frame aborts and FCS errors.

ifJnxCollisions

ifJnxEntry 25

Collisions: The number of output collisions detected on this interface.

ifJnxCarrierTrans

ifJnxEntry 26

Carrier transitions: The number of times the interface saw the carrier signal transition.

ifJnxOutQDrops

ifJnxEntry 27

Drops: The number of packets dropped by the output queue of the I/O Manager ASIC.

ifJnxOutAgedErrors

ifJnxEntry 28

Aged packets: The number of packets that remained in shared packet SDRAM for so long that the system automatically purged them.

ifJnxOutFifoErrors

ifJnxEntry 29

FIFO errors: The number of FIFO errors in the transmit direction as reported by the ASIC on the PIC.

ifJnxOutHslFifoUnderFlows

ifJnxEntry 30

HS link FIFO underflows: The number of FIFO underflows on the high-speed links between the ASICs responsible for handling the router interfaces.

ifJnxOutHslCrcErrors

ifJnxEntry 31

HS link CRC errors: The number of CRC errors on the high-speed links between the ASICs responsible for handling the router interfaces while transmitting packets.