[Contents] [Prev] [Next] [Index] [Report an Error]

Examples: Scheduling Packet Forwarding Component Queues

The two interfaces are so-0/1/0 and so-0/1/1.

According to customary wildcard rules, the so-0/1/0 configuration overrides the so-0/1/* configuration, implying that the chassis scheduler map MAP1 is not applied to so-0/1/0. However, the wildcard rule is not obeyed in this case; the chassis scheduler map applies to both interfaces so-0/1/0 and so-0/1/1.

Associating a Chassis Scheduler Map with a 2-Port IQ PIC

class-of-service {
interfaces {
so-0/1/0 {
unit 0 {
classifiers {
inet-precedence default;
}
}
}
so-0/1/* {
scheduler-map-chassis derived;
}
}
}

On a Gigabit Ethernet IQ PIC, you can apply the chassis scheduler map at both the specific interface level and the wildcard level. We do not recommend this because the wildcard chassis scheduler map takes precedence, which might not be the desired effect. For example, if you want to apply the chassis scheduler map MAP1 to port 0 and MAP2 to port 1, we do not recommend the following:

Not Recommended: Gigabit Ethernet IQ Example

[edit class-of-service]
interfaces {
ge-0/1/0 {
scheduler-map-chassis MAP1;
}
ge-0/1/* {
scheduler-map-chassis MAP2;
}
}

Instead, we recommend this:

Recommended: Gigabit Ethernet IQ Example

[edit class-of-service]
interfaces {
ge-0/1/0 {
scheduler-map-chassis MAP1;
}
ge-0/1/1 {
scheduler-map-chassis MAP2;
}
}

For ATM2 IQ interfaces, the CoS configuration differs significantly from that of other interface types. For more information about ATM CoS, see Configuring CoS on ATM Interfaces.

Configuring ATM CoS with a Normal Scheduler and a Chassis Scheduler

[edit class-of-service]
interfaces {
at-1/2/* {
scheduler-map-chassis derived;
}
}
 
[edit interfaces]
at-1/2/0 {
atm-options {
vpi 0;
linear-red-profiles red-profile-1 {
queue-depth 35000 high-plp-threshold 75 low-plp-threshold 25;
}
scheduler-maps map-1 {
vc-cos-mode strict;
forwarding-class best-effort {
priority low;
transmit-weight percent 25;
linear-red-profile red-profile-1;
}
}
}
unit 0 {
vci 0.128;
shaping {
vbr peak 20m sustained 10m burst 20;
}
atm-scheduler-map map-1;
family inet {
address 192.168.0.100/32 {
destination 192.168.0.101;
}
}
}
}

Configuring Two T3 Interfaces on a Channelized DS3 IQ PIC

[edit interfaces]
ct3-3/0/0 {
no-partition interface-type t3; # use entire port 0 as T3
}
ct3-3/0/1 {
no-partition interface-type t3; # use entire port 1 as T3
}
t3-3/0/0 {
unit 0 {
family inet {
address 10.0.100.1/30;
}
}
}
t3-3/0/1 {
unit 0 {
family inet {
address 10.0.101.1/30;
}
}
}

Configure a scheduler for the aggregated traffic transmitted into both T3 interfaces.

Associating Normal Schedulers with the Two T3 Interfaces

[edit class-of-service]
interfaces {
t3-3/0/0 {
scheduler-map sched-qct3-0;
}
t3-3/0/1 {
scheduler-map sched-qct3-1;
}
}
scheduler-maps {
sched-qct3-0 {
forwarding-class best-effort scheduler be-qct3-0;
forwarding-class expedited-forwarding scheduler ef-qct3-0;
forwarding-class assured-forwarding scheduler as-qct3-0;
forwarding-class network-control scheduler nc-qct3-0;
}
sched-qct3-1 {
forwarding-class best-effort scheduler be-qct3-1;
forwarding-class expedited-forwarding scheduler ef-qct3-1;
forwarding-class assured-forwarding scheduler as-qct3-1;
forwarding-class network-control scheduler nc-qct3-1;
}
sched-chassis-to-q {
forwarding-class best-effort scheduler be-chassis;
forwarding-class expedited-forwarding scheduler ef-chassis;
forwarding-class assured-forwarding scheduler as-chassis;
forwarding-class network-control scheduler nc-chassis;
}
}
schedulers {
be-qct3-0 {
transmit-rate percent 40;
}
ef-qct3-0 {
transmit-rate percent 30;
}
as-qct3-0 {
transmit-rate percent 20;
}
nc-qct3-0 {
transmit-rate percent 10;
}
...
}

Bind a scheduler to the aggregated traffic transmitted into the entire PIC. The chassis scheduler controls the traffic from the packet forwarding components feeding the interface t3-3/0/*.

Associating a Chassis Scheduler with the Two T3 Interfaces

[edit class-of-service]
interfaces {
t3-3/0/* {
scheduler-map-chassis derived;
}
}
[Contents] [Prev] [Next] [Index] [Report an Error]

Copyright © 2008, Juniper Networks, Inc. All rights reserved. Trademark Notice.