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System Requirements

To implement channelized IQ interfaces, your system must meet these requirements:

JUNOS Release 8.0 or later for DLCI-level scheduler support on E1 channels configured on Channelized STM1 IQ PICs
JUNOS Release 7.6 or later for converting a Channelized OC12 IQ PIC to a channelized STM4 SDH interface
JUNOS Release 7.5 or later for increased delay buffers on channelized E1 IQ, channelized DS3 IQ, channelized OC3 IQ, channelized STM1 IQ, and channelized T1 IQ interfaces; support for rate limiting on physical interfaces; and support for channelized STM1 IQ interfaces on T-series platforms
JUNOS Release 7.4 or later for channelized T1 IQ interfaces
JUNOS Release 7.1 or later for channelized OC3 IQ interfaces
JUNOS Release 6.3 or later for configuration of 256 DLCIs at the T3 channel level for channelized OC12 IQ interfaces
JUNOS Release 6.2 or later for configuration of 64 DLCIs at the T1 channel level for channelized OC12 IQ interfaces, 64 DLCIs at the E1 channel level for channelized STM1 IQ interfaces, and 256 DLCIs at the T3 channel level for channelized DS3 IQ interfaces
JUNOS Release 6.2 or later for configuration of flexible Frame Relay, extended Frame Relay circuit cross-connect (CCC), and extended Frame Relay translational cross-connect (TCC) encapsulation types
JUNOS Release 6.0 or later for logical interface-level class of service on channelized STM1 IQ interfaces, and APS/MSP on channelized OC12 IQ and channelized STM1 IQ interfaces
JUNOS Release 5.7 or later for channelized STM1 IQ interfaces
JUNOS Release 5.7 or later for logical interface-level class of service on the channelized DS3 IQ, channelized E1 IQ, and channelized OC12 IQ interfaces
JUNOS Release 5.6 or later for channelized DS3 IQ, channelized E1 IQ, and channelized OC12 IQ interfaces
Two Juniper Networks M-series or T320 routers equipped with an Enhanced Type 1 or Type 2 Flexible PIC Concentrator (FPC)

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