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show chassis fabric topology

Syntax

show chassis fabric topology
<lcc number | scc>
<sib-slot-number>

Syntax (TX Matrix Router)

show chassis fabric topology
<lcc number | scc>
<sib-slot-number>

Syntax (TX Matrix Plus Router)

show chassis fabric topology
<lcc number | sfc>
<sib-slot-number>

Release Information

Command introduced before JUNOS Release 7.4.

sfc option introduced for the TX Matrix Plus router in JUNOS Release 9.6.

Description

(TX Matrix, TX Matrix Plus, and T Series routers only) On the TX Matrix router. display the state of the switching fabric topology for the Switch Interface Board (SIB) connection between the TX Matrix router and the T640 routers. On the TX Matrix Plus router. display the state of the switching fabric topology for the SIB connection between the TX Matrix Plus router and the T1600 routers.

Options

none — Display the fabric topology state for the TX Matrix router and for all the T640 routers connected to it.

lcc number — (TX Matrix and TX Matrix Plus routers only) (Optional) On a TX Matrix router, display the fabric topology state for a specified T640 router (or line-card chassis) that is connected to a TX Matrix router. On a TX Matrix Plus router, display the fabric topology state for a specified T1600 router (or line-card chassis) that is connected to the TX Matrix Plus router. Replace number with a value from 0 through 3.

scc — (TX Matrix routers only) (Optional) Display the fabric topology state for the TX Matrix router (or switch-card chassis).

sfc number — (TX Matrix Plus routers only) (Optional) Display the fabric topology for the TX Matrix Plus router (or switch-fabric chassis). Replace number with 0.

sib-slot-number — (Optional) Display the fabric topology state for a specified SIB slot. Replace sib-slot-number with a value from 0 through 4. On a TX Matrix Plus router, replace sib-slot-number with a value from 0 through 15.

Required Privilege Level

view

List of Sample Output

show chassis fabric topology scc
show chassis fabric topology lcc
show chassis fabric topology sfc (TX Matrix Plus Router)
show chassis fabric topology lcc

Output Fields

Table 63 lists the output fields for theshow chassis fabric topology command. Output fields are listed in the approximate order in which they appear.

Table 63: show chassis fabric topology Output Fields

Field Name

Field Description

in-links

Fabric topology for receive side links.

out-links

Fabric topology for transmit side links.

state

State of the fabric link:

  • RESET—Link between SIB and FPC/DPC is powered down on purpose. This is done in all non-dual Packet Forwarding Engine based boards.
  • UP—Link between SIB and FPC/DCP is up and running.
  • DOWN—Link between SIB and FPC/DCP is powered down.
  • FAULT—SIB is in alarmed state where the SIB’s plane is not operational for the following reasons:
    • On-board F-chip is not operational.
    • Fiber optic connector faults.
    • FPC connector faults.
    • SIB mid-plane connector faults.

Sample Output

show chassis fabric topology scc

user@host> show chassis fabric topology scc 
scc-re1:
--------------------------------------------------------------------------------
fchip (mode)
in-links								state 		out-links 								state
-------------------------------------------------------------------------------- 
Sib #0 :
---------
SIB0_F0 (F2 ):
LCC0_SIB-L0_F0,03->SIB-S0_F0,00	 UP 								SIB-S0_F0,00->LCC0_SIB-L0_F1,00  UP
LCC1_SIB-L0_F0,03->SIB-S0_F0,01	 UP 								SIB-S0_F0,01->LCC1_SIB-L0_F1,08  UP
LCC2_SIB-L0_F0,03->SIB-S0_F0,02	 RESET							SIB-S0_F0,02->LCC2_SIB-L0_F1,08  UP
LCC3_SIB-L0_F0,03->SIB-S0_F0,03	 RESET							SIB-S0_F0,03->LCC3_SIB-L0_F1,00  UP
LCC0_SIB-L0_F0,02->SIB-S0_F0,04  UP 								SIB-S0_F0,04->LCC0_SIB-L0_F1,01  UP
LCC1_SIB-L0_F0,02->SIB-S0_F0,05  UP 								SIB-S0_F0,05->LCC1_SIB-L0_F1,09  UP
LCC2_SIB-L0_F0,02->SIB-S0_F0,06  RESET							SIB-S0_F0,06->LCC2_SIB-L0_F1,09  UP
LCC3_SIB-L0_F0,02->SIB-S0_F0,07  RESET							SIB-S0_F0,07->LCC3_SIB-L0_F1,01  UP
LCC0_SIB-L0_F0,07->SIB-S0_F0,08  UP 								SIB-S0_F0,08->LCC0_SIB-L0_F1,04  UP
LCC1_SIB-L0_F0,07->SIB-S0_F0,09  UP 								SIB-S0_F0,09->LCC1_SIB-L0_F1,12  UP
LCC2_SIB-L0_F0,07->SIB-S0_F0,10  RESET							SIB-S0_F0,10->LCC2_SIB-L0_F1,12  UP
LCC3_SIB-L0_F0,07->SIB-S0_F0,11  RESET							SIB-S0_F0,11->LCC3_SIB-L0_F1,04  UP
LCC0_SIB-L0_F0,06->SIB-S0_F0,12  UP 								SIB-S0_F0,12->LCC0_SIB-L0_F1,05  UP
LCC1_SIB-L0_F0,06->SIB-S0_F0,13  UP 								SIB-S0_F0,13->LCC1_SIB-L0_F1,13  UP
LCC2_SIB-L0_F0,06->SIB-S0_F0,14  RESET							SIB-S0_F0,14->LCC2_SIB-L0_F1,13  UP
LCC3_SIB-L0_F0,06->SIB-S0_F0,15  RESET							SIB-S0_F0,15->LCC3_SIB-L0_F1,05  UP
SIB0_F1 (F2 ):
LCC0_SIB-L0_F0,11->SIB-S0_F1,00  UP 								SIB-S0_F1,00->LCC0_SIB-L0_F1,08  UP
LCC1_SIB-L0_F0,11->SIB-S0_F1,01  UP 								SIB-S0_F1,01->LCC1_SIB-L0_F1,00  UP
LCC2_SIB-L0_F0,11->SIB-S0_F1,02  RESET							SIB-S0_F1,02->LCC2_SIB-L0_F1,00  UP
LCC3_SIB-L0_F0,11->SIB-S0_F1,03  RESET							SIB-S0_F1,03->LCC3_SIB-L0_F1,08  UP
LCC0_SIB-L0_F0,10->SIB-S0_F1,04  UP 								SIB-S0_F1,04->LCC0_SIB-L0_F1,09  UP
LCC1_SIB-L0_F0,10->SIB-S0_F1,05  UP 								SIB-S0_F1,05->LCC1_SIB-L0_F1,01  UP
LCC2_SIB-L0_F0,10->SIB-S0_F1,06  RESET							SIB-S0_F1,06->LCC2_SIB-L0_F1,01  UP
LCC3_SIB-L0_F0,10->SIB-S0_F1,07  RESET							SIB-S0_F1,07->LCC3_SIB-L0_F1,09  UP
LCC0_SIB-L0_F0,15->SIB-S0_F1,08  UP 								SIB-S0_F1,08->LCC0_SIB-L0_F1,12  UP
LCC1_SIB-L0_F0,15->SIB-S0_F1,09  UP 								SIB-S0_F1,09->LCC1_SIB-L0_F1,04  UP
LCC2_SIB-L0_F0,15->SIB-S0_F1,10  RESET							SIB-S0_F1,10->LCC2_SIB-L0_F1,04  UP
LCC3_SIB-L0_F0,15->SIB-S0_F1,11  RESET							SIB-S0_F1,11->LCC3_SIB-L0_F1,12  UP
LCC0_SIB-L0_F0,14->SIB-S0_F1,12  UP 								SIB-S0_F1,12->LCC0_SIB-L0_F1,13  UP
LCC1_SIB-L0_F0,14->SIB-S0_F1,13  UP 								SIB-S0_F1,13->LCC1_SIB-L0_F1,05  UP
LCC2_SIB-L0_F0,14->SIB-S0_F1,14  RESET 							SIB-S0_F1,14->LCC2_SIB-L0_F1,05  UP
LCC3_SIB-L0_F0,14->SIB-S0_F1,15  RESET 							SIB-S0_F1,15->LCC3_SIB-L0_F1,13  UP
SIB0_F2 (F2 ):
LCC3_SIB-L0_F0,13->SIB-S0_F2,00 		RESET 					SIB-S0_F2,00->LCC3_SIB-L0_F1,14  UP
LCC2_SIB-L0_F0,13->SIB-S0_F2,01  RESET 							SIB-S0_F2,01->LCC2_SIB-L0_F1,06  UP
LCC1_SIB-L0_F0,13->SIB-S0_F2,02  UP 								SIB-S0_F2,02->LCC1_SIB-L0_F1,06  UP
LCC0_SIB-L0_F0,13->SIB-S0_F2,03  UP 								SIB-S0_F2,03->LCC0_SIB-L0_F1,14  UP
LCC3_SIB-L0_F0,12->SIB-S0_F2,04  RESET 							SIB-S0_F2,04->LCC3_SIB-L0_F1,15  UP
LCC2_SIB-L0_F0,12->SIB-S0_F2,05  RESET							SIB-S0_F2,05->LCC2_SIB-L0_F1,07  UP
LCC1_SIB-L0_F0,12->SIB-S0_F2,06  UP 								SIB-S0_F2,06->LCC1_SIB-L0_F1,07  UP
LCC0_SIB-L0_F0,12->SIB-S0_F2,07  UP 								SIB-S0_F2,07->LCC0_SIB-L0_F1,15  UP
LCC3_SIB-L0_F0,09->SIB-S0_F2,08  RESET 							SIB-S0_F2,08->LCC3_SIB-L0_F1,10  UP
LCC2_SIB-L0_F0,09->SIB-S0_F2,09  RESET 							SIB-S0_F2,09->LCC2_SIB-L0_F1,02  UP
LCC1_SIB-L0_F0,09->SIB-S0_F2,10  UP 								SIB-S0_F2,10->LCC1_SIB-L0_F1,02  UP
LCC0_SIB-L0_F0,09->SIB-S0_F2,11  UP 								SIB-S0_F2,11->LCC0_SIB-L0_F1,10  UP
LCC3_SIB-L0_F0,08->SIB-S0_F2,12  RESET 							SIB-S0_F2,12->LCC3_SIB-L0_F1,11  UP
LCC2_SIB-L0_F0,08->SIB-S0_F2,13  RESET 							SIB-S0_F2,13->LCC2_SIB-L0_F1,03  UP
LCC1_SIB-L0_F0,08->SIB-S0_F2,14	 UP 								SIB-S0_F2,14->LCC1_SIB-L0_F1,03  UP
LCC0_SIB-L0_F0,08->SIB-S0_F2,15  UP 								SIB-S0_F2,15->LCC0_SIB-L0_F1,11  UP
SIB0_F3 (F2 ):
LCC3_SIB-L0_F0,05->SIB-S0_F3,00  RESET 							SIB-S0_F3,00->LCC3_SIB-L0_F1,06  UP
LCC2_SIB-L0_F0,05->SIB-S0_F3,01  RESET 							SIB-S0_F3,01->LCC2_SIB-L0_F1,14  UP
LCC1_SIB-L0_F0,05->SIB-S0_F3,02  UP 								SIB-S0_F3,02->LCC1_SIB-L0_F1,14  UP
LCC0_SIB-L0_F0,05->SIB-S0_F3,03  UP 								SIB-S0_F3,03->LCC0_SIB-L0_F1,06  UP
LCC3_SIB-L0_F0,04->SIB-S0_F3,04  RESET 							SIB-S0_F3,04->LCC3_SIB-L0_F1,07  UP
LCC2_SIB-L0_F0,04->SIB-S0_F3,05  RESET 							SIB-S0_F3,05->LCC2_SIB-L0_F1,15  UP
LCC1_SIB-L0_F0,04->SIB-S0_F3,06  UP 								SIB-S0_F3,06->LCC1_SIB-L0_F1,15  UP
LCC0_SIB-L0_F0,04->SIB-S0_F3,07  UP 								SIB-S0_F3,07->LCC0_SIB-L0_F1,07  UP
LCC3_SIB-L0_F0,01->SIB-S0_F3,08  RESET 							SIB-S0_F3,08->LCC3_SIB-L0_F1,02  UP
LCC2_SIB-L0_F0,01->SIB-S0_F3,09  RESET 							SIB-S0_F3,09->LCC2_SIB-L0_F1,10  UP
LCC1_SIB-L0_F0,01->SIB-S0_F3,10  UP 								SIB-S0_F3,10->LCC1_SIB-L0_F1,10  UP
LCC0_SIB-L0_F0,01->SIB-S0_F3,11  UP 								SIB-S0_F3,11->LCC0_SIB-L0_F1,02  UP
LCC3_SIB-L0_F0,00->SIB-S0_F3,12  RESET 							SIB-S0_F3,12->LCC3_SIB-L0_F1,03  UP
LCC2_SIB-L0_F0,00->SIB-S0_F3,13  RESET 							SIB-S0_F3,13->LCC2_SIB-L0_F1,11  UP
LCC1_SIB-L0_F0,00->SIB-S0_F3,14  UP 								SIB-S0_F3,14->LCC1_SIB-L0_F1,11  UP
LCC0_SIB-L0_F0,00->SIB-S0_F3,15  UP 								SIB-S0_F3,15->LCC0_SIB-L0_F1,03  UP
Sib #1 :
---------
SIB1_F0 (F2 ):
LCC0_SIB-L1_F0,03->SIB-S1_F0,00 RESET 							SIB-S1_F0,00->LCC0_SIB-L1_F1,00  UP
LCC1_SIB-L1_F0,03->SIB-S1_F0,01 RESET 							SIB-S1_F0,01->LCC1_SIB-L1_F1,08  UP
LCC2_SIB-L1_F0,03->SIB-S1_F0,02 RESET 							SIB-S1_F0,02->LCC2_SIB-L1_F1,08  UP
LCC3_SIB-L1_F0,03->SIB-S1_F0,03 RESET 							SIB-S1_F0,03->LCC3_SIB-L1_F1,00  UP
LCC0_SIB-L1_F0,02->SIB-S1_F0,04 RESET 							SIB-S1_F0,04->LCC0_SIB-L1_F1,01  UP
LCC1_SIB-L1_F0,02->SIB-S1_F0,05 RESET 							SIB-S1_F0,05->LCC1_SIB-L1_F1,09  UP
LCC2_SIB-L1_F0,02->SIB-S1_F0,06 RESET 							SIB-S1_F0,06->LCC2_SIB-L1_F1,09  UP
LCC3_SIB-L1_F0,02->SIB-S1_F0,07 RESET 							SIB-S1_F0,07->LCC3_SIB-L1_F1,01  UP
LCC0_SIB-L1_F0,07->SIB-S1_F0,08 RESET 							SIB-S1_F0,08->LCC0_SIB-L1_F1,04  UP
LCC1_SIB-L1_F0,07->SIB-S1_F0,09 RESET 							SIB-S1_F0,09->LCC1_SIB-L1_F1,12  UP
LCC2_SIB-L1_F0,07->SIB-S1_F0,10 RESET 							SIB-S1_F0,10->LCC2_SIB-L1_F1,12	 UP
LCC3_SIB-L1_F0,07->SIB-S1_F0,11 RESET 							SIB-S1_F0,11->LCC3_SIB-L1_F1,04	 UP
LCC0_SIB-L1_F0,06->SIB-S1_F0,12 RESET 							SIB-S1_F0,12->LCC0_SIB-L1_F1,05  UP
LCC1_SIB-L1_F0,06->SIB-S1_F0,13 RESET 							SIB-S1_F0,13->LCC1_SIB-L1_F1,13  UP
LCC2_SIB-L1_F0,06->SIB-S1_F0,14 RESET 							SIB-S1_F0,14->LCC2_SIB-L1_F1,13  UP
LCC3_SIB-L1_F0,06->SIB-S1_F0,15 RESET 							SIB-S1_F0,15->LCC3_SIB-L1_F1,05  UP
SIB1_F1 (F2 ):
LCC0_SIB-L1_F0,11->SIB-S1_F1,00 RESET 							SIB-S1_F1,00->LCC0_SIB-L1_F1,08  UP
LCC1_SIB-L1_F0,11->SIB-S1_F1,01 RESET 							SIB-S1_F1,01->LCC1_SIB-L1_F1,00  UP
LCC2_SIB-L1_F0,11->SIB-S1_F1,02 RESET 							SIB-S1_F1,02->LCC2_SIB-L1_F1,00  UP
LCC3_SIB-L1_F0,11->SIB-S1_F1,03 RESET 							SIB-S1_F1,03->LCC3_SIB-L1_F1,08  UP
LCC0_SIB-L1_F0,10->SIB-S1_F1,04 RESET 							SIB-S1_F1,04->LCC0_SIB-L1_F1,09	 UP
LCC1_SIB-L1_F0,10->SIB-S1_F1,05 RESET								SIB-S1_F1,05->LCC1_SIB-L1_F1,01  UP
LCC2_SIB-L1_F0,10->SIB-S1_F1,06 RESET 							SIB-S1_F1,06->LCC2_SIB-L1_F1,01  UP
LCC3_SIB-L1_F0,10->SIB-S1_F1,07 RESET 							SIB-S1_F1,07->LCC3_SIB-L1_F1,09  UP
LCC0_SIB-L1_F0,15->SIB-S1_F1,08 RESET 							SIB-S1_F1,08->LCC0_SIB-L1_F1,12  UP
LCC1_SIB-L1_F0,15->SIB-S1_F1,09 RESET 							SIB-S1_F1,09->LCC1_SIB-L1_F1,04  UP
LCC2_SIB-L1_F0,15->SIB-S1_F1,10 RESET 							SIB-S1_F1,10->LCC2_SIB-L1_F1,04  UP
LCC3_SIB-L1_F0,15->SIB-S1_F1,11 RESET 							-S1_F1,11->LCC3_SIB-L1_F1,12,05  UP
LCC0_SIB-L1_F0,14->SIB-S1_F1,12 RESET 							SIB-S1_F1,12->LCC0_SIB-L1_F1,13  UP
LCC1_SIB-L1_F0,14->SIB-S1_F1,13 RESET 							SIB-S1_F1,13->LCC1_SIB-L1_F1,05  UP
LCC2_SIB-L1_F0,14->SIB-S1_F1,14 RESET 							SIB-S1_F1,14->LCC2_SIB-L1_F1,05  UP

show chassis fabric topology lcc

user@host> show chassis fabric topology lcc 0 
lcc0-re0:
--------------------------------------------------------------------------
   fchip (mode)
in-links                state         out-links               state
-------------------------------------------------------------------
Sib #2 :
---------
SIB2_F0  (F1 ):
FPC0_T->SIB-L2_F0,00    DOWN       SIB-L2_F0,00->SIB-S2_F3,15 DOWN
FPC0_B->SIB-L2_F0,01    UP         SIB-L2_F0,01->SIB-S2_F3,11 DOWN
FPC1_T->SIB-L2_F0,02    DOWN       SIB-L2_F0,02->SIB-S2_F0,04 DOWN
FPC1_B->SIB-L2_F0,03    DOWN       SIB-L2_F0,03->SIB-S2_F0,00 DOWN
FPC2_T->SIB-L2_F0,04    DOWN       SIB-L2_F0,04->SIB-S2_F3,07 DOWN
FPC2_B->SIB-L2_F0,05    DOWN       SIB-L2_F0,05->SIB-S2_F3,03 DOWN
FPC3_T->SIB-L2_F0,06    DOWN       SIB-L2_F0,06->SIB-S2_F0,12 DOWN
FPC3_B->SIB-L2_F0,07    DOWN       SIB-L2_F0,07->SIB-S2_F0,08 DOWN
FPC4_T->SIB-L2_F0,08    DOWN       SIB-L2_F0,08->SIB-S2_F2,15 DOWN
FPC4_B->SIB-L2_F0,09    DOWN       SIB-L2_F0,09->SIB-S2_F2,11 DOWN
FPC5_T->SIB-L2_F0,10    DOWN       SIB-L2_F0,10->SIB-S2_F1,04 DOWN
FPC5_B->SIB-L2_F0,11    DOWN       SIB-L2_F0,11->SIB-S2_F1,00 DOWN
FPC6_T->SIB-L2_F0,12    DOWN       SIB-L2_F0,12->SIB-S2_F2,07 DOWN
FPC6_B->SIB-L2_F0,13    UP         SIB-L2_F0,13->SIB-S2_F2,03 DOWN
FPC7_T->SIB-L2_F0,14    DOWN       SIB-L2_F0,14->SIB-S2_F1,12 DOWN
FPC7_B->SIB-L2_F0,15    DOWN       SIB-L2_F0,15->SIB-S2_F1,08 DOWN
SIB2_F1  (F3 ):
SIB-S2_F0,00->SIB-L2_F1,00 UP      SIB-L2_F1,00->FPC7_B    DOWN
SIB-S2_F0,04->SIB-L2_F1,01 UP      SIB-L2_F1,01->FPC7_T    DOWN
SIB-S2_F3,11->SIB-L2_F1,02 UP      SIB-L2_F1,02->FPC6_B    DOWN
SIB-S2_F3,15->SIB-L2_F1,03 UP      SIB-L2_F1,03->FPC6_T    DOWN
SIB-S2_F0,08->SIB-L2_F1,04 UP      SIB-L2_F1,04->FPC5_B    DOWN
SIB-S2_F0,12->SIB-L2_F1,05 UP      SIB-L2_F1,05->FPC5_T    DOWN
SIB-S2_F3,03->SIB-L2_F1,06 UP      SIB-L2_F1,06->FPC4_B    DOWN
SIB-S2_F3,07->SIB-L2_F1,07 UP      SIB-L2_F1,07->FPC4_T    DOWN
SIB-S2_F1,00->SIB-L2_F1,08 UP      SIB-L2_F1,08->FPC3_B    DOWN
SIB-S2_F1,04->SIB-L2_F1,09 UP      SIB-L2_F1,09->FPC3_T    DOWN
SIB-S2_F2,11->SIB-L2_F1,10 UP      SIB-L2_F1,10->FPC2_B    DOWN
SIB-S2_F2,15->SIB-L2_F1,11 UP      SIB-L2_F1,11->FPC2_T    DOWN
SIB-S2_F1,08->SIB-L2_F1,12 UP      SIB-L2_F1,12->FPC1_B    DOWN
SIB-S2_F1,12->SIB-L2_F1,13 UP      SIB-L2_F1,13->FPC1_T    DOWN
SIB-S2_F2,03->SIB-L2_F1,14 UP      SIB-L2_F1,14->FPC0_B    DOWN
SIB-S2_F2,07->SIB-L2_F1,15 UP      SIB-L2_F1,15->FPC0_T    DOWN
Sib #4 :
---------
SIB4_F0  (F1 ):
FPC0_T->SIB-L4_F0,00    RESET      SIB-L4_F0,00->SIB-S4_F3,15 UP
FPC0_B->SIB-L4_F0,01    UP         SIB-L4_F0,01->SIB-S4_F3,11 UP
FPC1_T->SIB-L4_F0,02    RESET      SIB-L4_F0,02->SIB-S4_F0,04 UP
FPC1_B->SIB-L4_F0,03    RESET      SIB-L4_F0,03->SIB-S4_F0,00 UP
FPC2_T->SIB-L4_F0,04    RESET      SIB-L4_F0,04->SIB-S4_F3,07 UP
FPC2_B->SIB-L4_F0,05    RESET      SIB-L4_F0,05->SIB-S4_F3,03 UP
FPC3_T->SIB-L4_F0,06    RESET      SIB-L4_F0,06->SIB-S4_F0,12 UP
FPC3_B->SIB-L4_F0,07    RESET      SIB-L4_F0,07->SIB-S4_F0,08 UP
FPC4_T->SIB-L4_F0,08    RESET      SIB-L4_F0,08->SIB-S4_F2,15 UP
FPC4_B->SIB-L4_F0,09    RESET      SIB-L4_F0,09->SIB-S4_F2,11 UP
FPC5_T->SIB-L4_F0,10    RESET      SIB-L4_F0,10->SIB-S4_F1,04 UP
FPC5_B->SIB-L4_F0,11    RESET      SIB-L4_F0,11->SIB-S4_F1,00 UP
FPC6_T->SIB-L4_F0,12    RESET      SIB-L4_F0,12->SIB-S4_F2,07 UP
FPC6_B->SIB-L4_F0,13    UP         SIB-L4_F0,13->SIB-S4_F2,03 UP
FPC7_T->SIB-L4_F0,14    RESET      SIB-L4_F0,14->SIB-S4_F1,12 UP
FPC7_B->SIB-L4_F0,15    RESET      SIB-L4_F0,15->SIB-S4_F1,08 UP
SIB4_F1  (F3 ):
SIB-S4_F0,00->SIB-L4_F1,00 UP      SIB-L4_F1,00->FPC7_B    UP
SIB-S4_F0,04->SIB-L4_F1,01 UP      SIB-L4_F1,01->FPC7_T    UP
SIB-S4_F3,11->SIB-L4_F1,02 UP      SIB-L4_F1,02->FPC6_B    UP
SIB-S4_F3,15->SIB-L4_F1,03 UP      SIB-L4_F1,03->FPC6_T    UP
SIB-S4_F0,08->SIB-L4_F1,04 UP      SIB-L4_F1,04->FPC5_B    UP
SIB-S4_F0,12->SIB-L4_F1,05 UP      SIB-L4_F1,05->FPC5_T    UP
SIB-S4_F3,03->SIB-L4_F1,06 UP      SIB-L4_F1,06->FPC4_B    UP
SIB-S4_F3,07->SIB-L4_F1,07 UP      SIB-L4_F1,07->FPC4_T    UP
SIB-S4_F1,00->SIB-L4_F1,08 UP      SIB-L4_F1,08->FPC3_B    UP
SIB-S4_F1,04->SIB-L4_F1,09 UP      SIB-L4_F1,09->FPC3_T    UP
SIB-S4_F2,11->SIB-L4_F1,10 UP      SIB-L4_F1,10->FPC2_B    UP
SIB-S4_F2,15->SIB-L4_F1,11 UP      SIB-L4_F1,11->FPC2_T    UP
SIB-S4_F1,08->SIB-L4_F1,12 UP      SIB-L4_F1,12->FPC1_B    UP
SIB-S4_F1,12->SIB-L4_F1,13 UP      SIB-L4_F1,13->FPC1_T    UP
SIB-S4_F2,03->SIB-L4_F1,14 UP      SIB-L4_F1,14->FPC0_B    UP
SIB-S4_F2,07->SIB-L4_F1,15 UP      SIB-L4_F1,15->FPC0_T    UP

show chassis fabric topology sfc (TX Matrix Plus Router)

user@host> show chassis fabric topology sfc 0 
sfc0-re0:
--------------------------------------------------------------------------

SIB:0
=====

Out-Links:
=========
SFC0_F13_SIB_36     -> LCC00_ST_SIB_L00                 Status
====================================================================
SF_3_00_FB_D(04,11) -> FPC0_T_SG(0,0,0)_FB_D(04,11)     OK
SF_3_00_FB_D(04,10) -> FPC0_T_SG(0,0,1)_FB_D(04,10)     OK
SF_3_00_FB_D(04,09) -> FPC0_T_SG(0,0,2)_FB_D(04,09)     OK
SF_3_00_FB_D(04,08) -> FPC0_T_SG(0,0,3)_FB_D(04,08)     OK
SF_3_00_FB_D(04,07) -> FPC0_T_SG(0,0,4)_FB_D(04,07)     OK
SF_3_00_FB_D(04,06) -> FPC0_T_SG(0,0,5)_FB_D(04,06)     OK
SF_3_00_FB_D(04,05) -> FPC0_T_SG(0,0,6)_FB_D(04,05)     OK
SF_3_00_FB_D(04,04) -> FPC0_T_SG(0,0,7)_FB_D(04,04)     OK
SF_3_01_FB_B(16,11) -> FPC4_T_SG(2,0,0)_FB_B(16,11)     OK
SF_3_01_FB_B(16,10) -> FPC4_T_SG(2,0,1)_FB_B(16,10)     OK
SF_3_01_FB_B(16,09) -> FPC4_T_SG(2,0,2)_FB_B(16,09)     OK
SF_3_01_FB_B(16,08) -> FPC4_T_SG(2,0,3)_FB_B(16,08)     OK
SF_3_01_FB_B(16,07) -> FPC4_T_SG(2,0,4)_FB_B(16,07)     OK
SF_3_01_FB_B(16,06) -> FPC4_T_SG(2,0,5)_FB_B(16,06)     OK
SF_3_01_FB_B(16,05) -> FPC4_T_SG(2,0,6)_FB_B(16,05)     OK
SF_3_01_FB_B(16,04) -> FPC4_T_SG(2,0,7)_FB_B(16,04)     OK
SF_3_02_FB_D(05,08) -> FPC1_T_SG(0,2,0)_FB_D(05,08)     OK
SF_3_02_FB_D(05,07) -> FPC1_T_SG(0,2,1)_FB_D(05,07)     OK
SF_3_02_FB_D(05,06) -> FPC1_T_SG(0,2,2)_FB_D(05,06)     OK
SF_3_02_FB_D(05,05) -> FPC1_T_SG(0,2,3)_FB_D(05,05)     OK
SF_3_02_FB_D(05,03) -> FPC1_T_SG(0,2,4)_FB_D(05,03)     OK
SF_3_02_FB_D(05,02) -> FPC1_T_SG(0,2,5)_FB_D(05,02)     OK
SF_3_02_FB_D(05,01) -> FPC1_T_SG(0,2,6)_FB_D(05,01)     OK
SF_3_02_FB_D(05,00) -> FPC1_T_SG(0,2,7)_FB_D(05,00)     OK
SF_3_03_FB_B(17,08) -> FPC5_T_SG(2,2,0)_FB_B(17,08)     OK
SF_3_03_FB_B(17,07) -> FPC5_T_SG(2,2,1)_FB_B(17,07)     OK
SF_3_03_FB_B(17,06) -> FPC5_T_SG(2,2,2)_FB_B(17,06)     OK
SF_3_03_FB_B(17,05) -> FPC5_T_SG(2,2,3)_FB_B(17,05)     OK
...
In-Links:
==========
LCC00_ST_SIB_L00              -> SFC0_F13_SIB_36        Status
====================================================================
FPC0_T_SG(0,0,0)_FB_D(01,11)  -> SF_1_00_FB_D(01,11)    OK
FPC0_T_SG(0,0,1)_FB_D(01,10)  -> SF_1_00_FB_D(01,10)    OK
FPC0_T_SG(0,0,2)_FB_D(01,09)  -> SF_1_00_FB_D(01,09)    OK
FPC0_T_SG(0,0,3)_FB_D(01,08)  -> SF_1_00_FB_D(01,08)    OK
FPC0_T_SG(0,0,4)_FB_D(01,07)  -> SF_1_00_FB_D(01,07)    OK
FPC0_T_SG(0,0,5)_FB_D(01,06)  -> SF_1_00_FB_D(01,06)    OK
FPC0_T_SG(0,0,6)_FB_D(01,05)  -> SF_1_00_FB_D(01,05)    OK
FPC0_T_SG(0,0,7)_FB_D(01,04)  -> SF_1_00_FB_D(01,04)    OK
FPC4_T_SG(2,0,0)_FB_B(13,11)  -> SF_1_01_FB_B(13,11)    OK
FPC4_T_SG(2,0,1)_FB_B(13,10)  -> SF_1_01_FB_B(13,10)    OK
FPC4_T_SG(2,0,2)_FB_B(13,09)  -> SF_1_01_FB_B(13,09)    OK
FPC4_T_SG(2,0,3)_FB_B(13,08)  -> SF_1_01_FB_B(13,08)    OK
FPC4_T_SG(2,0,4)_FB_B(13,07)  -> SF_1_01_FB_B(13,07)    OK
FPC4_T_SG(2,0,5)_FB_B(13,06)  -> SF_1_01_FB_B(13,06)    OK
FPC4_T_SG(2,0,6)_FB_B(13,05)  -> SF_1_01_FB_B(13,05)    OK
FPC4_T_SG(2,0,7)_FB_B(13,04)  -> SF_1_01_FB_B(13,04)    OK
FPC1_T_SG(0,2,0)_FB_D(02,08)  -> SF_1_02_FB_D(02,08)    OK
FPC1_T_SG(0,2,1)_FB_D(02,07)  -> SF_1_02_FB_D(02,07)    OK
FPC1_T_SG(0,2,2)_FB_D(02,06)  -> SF_1_02_FB_D(02,06)    OK
FPC1_T_SG(0,2,3)_FB_D(02,05)  -> SF_1_02_FB_D(02,05)    OK
...

show chassis fabric topology lcc

user@host> show chassis fabric topology lcc 0 
lcc0-re0:
--------------------------------------------------------------------------
   fchip (mode)
in-links                state         out-links               state
-------------------------------------------------------------------
Sib #2 :
---------
SIB2_F0  (F1 ):
FPC0_T->SIB-L2_F0,00    DOWN       SIB-L2_F0,00->SIB-S2_F3,15 DOWN
FPC0_B->SIB-L2_F0,01    UP         SIB-L2_F0,01->SIB-S2_F3,11 DOWN
FPC1_T->SIB-L2_F0,02    DOWN       SIB-L2_F0,02->SIB-S2_F0,04 DOWN
FPC1_B->SIB-L2_F0,03    DOWN       SIB-L2_F0,03->SIB-S2_F0,00 DOWN
FPC2_T->SIB-L2_F0,04    DOWN       SIB-L2_F0,04->SIB-S2_F3,07 DOWN
FPC2_B->SIB-L2_F0,05    DOWN       SIB-L2_F0,05->SIB-S2_F3,03 DOWN
FPC3_T->SIB-L2_F0,06    DOWN       SIB-L2_F0,06->SIB-S2_F0,12 DOWN
FPC3_B->SIB-L2_F0,07    DOWN       SIB-L2_F0,07->SIB-S2_F0,08 DOWN
FPC4_T->SIB-L2_F0,08    DOWN       SIB-L2_F0,08->SIB-S2_F2,15 DOWN
FPC4_B->SIB-L2_F0,09    DOWN       SIB-L2_F0,09->SIB-S2_F2,11 DOWN
FPC5_T->SIB-L2_F0,10    DOWN       SIB-L2_F0,10->SIB-S2_F1,04 DOWN
FPC5_B->SIB-L2_F0,11    DOWN       SIB-L2_F0,11->SIB-S2_F1,00 DOWN
FPC6_T->SIB-L2_F0,12    DOWN       SIB-L2_F0,12->SIB-S2_F2,07 DOWN
FPC6_B->SIB-L2_F0,13    UP         SIB-L2_F0,13->SIB-S2_F2,03 DOWN
FPC7_T->SIB-L2_F0,14    DOWN       SIB-L2_F0,14->SIB-S2_F1,12 DOWN
FPC7_B->SIB-L2_F0,15    DOWN       SIB-L2_F0,15->SIB-S2_F1,08 DOWN
SIB2_F1  (F3 ):
SIB-S2_F0,00->SIB-L2_F1,00 UP      SIB-L2_F1,00->FPC7_B    DOWN
SIB-S2_F0,04->SIB-L2_F1,01 UP      SIB-L2_F1,01->FPC7_T    DOWN
SIB-S2_F3,11->SIB-L2_F1,02 UP      SIB-L2_F1,02->FPC6_B    DOWN
SIB-S2_F3,15->SIB-L2_F1,03 UP      SIB-L2_F1,03->FPC6_T    DOWN
SIB-S2_F0,08->SIB-L2_F1,04 UP      SIB-L2_F1,04->FPC5_B    DOWN
SIB-S2_F0,12->SIB-L2_F1,05 UP      SIB-L2_F1,05->FPC5_T    DOWN
SIB-S2_F3,03->SIB-L2_F1,06 UP      SIB-L2_F1,06->FPC4_B    DOWN
SIB-S2_F3,07->SIB-L2_F1,07 UP      SIB-L2_F1,07->FPC4_T    DOWN
SIB-S2_F1,00->SIB-L2_F1,08 UP      SIB-L2_F1,08->FPC3_B    DOWN
SIB-S2_F1,04->SIB-L2_F1,09 UP      SIB-L2_F1,09->FPC3_T    DOWN
SIB-S2_F2,11->SIB-L2_F1,10 UP      SIB-L2_F1,10->FPC2_B    DOWN
SIB-S2_F2,15->SIB-L2_F1,11 UP      SIB-L2_F1,11->FPC2_T    DOWN
SIB-S2_F1,08->SIB-L2_F1,12 UP      SIB-L2_F1,12->FPC1_B    DOWN
SIB-S2_F1,12->SIB-L2_F1,13 UP      SIB-L2_F1,13->FPC1_T    DOWN
SIB-S2_F2,03->SIB-L2_F1,14 UP      SIB-L2_F1,14->FPC0_B    DOWN
SIB-S2_F2,07->SIB-L2_F1,15 UP      SIB-L2_F1,15->FPC0_T    DOWN
Sib #4 :
---------
SIB4_F0  (F1 ):
FPC0_T->SIB-L4_F0,00    RESET      SIB-L4_F0,00->SIB-S4_F3,15 UP
FPC0_B->SIB-L4_F0,01    UP         SIB-L4_F0,01->SIB-S4_F3,11 UP
FPC1_T->SIB-L4_F0,02    RESET      SIB-L4_F0,02->SIB-S4_F0,04 UP
FPC1_B->SIB-L4_F0,03    RESET      SIB-L4_F0,03->SIB-S4_F0,00 UP
FPC2_T->SIB-L4_F0,04    RESET      SIB-L4_F0,04->SIB-S4_F3,07 UP
FPC2_B->SIB-L4_F0,05    RESET      SIB-L4_F0,05->SIB-S4_F3,03 UP
FPC3_T->SIB-L4_F0,06    RESET      SIB-L4_F0,06->SIB-S4_F0,12 UP
FPC3_B->SIB-L4_F0,07    RESET      SIB-L4_F0,07->SIB-S4_F0,08 UP
FPC4_T->SIB-L4_F0,08    RESET      SIB-L4_F0,08->SIB-S4_F2,15 UP
FPC4_B->SIB-L4_F0,09    RESET      SIB-L4_F0,09->SIB-S4_F2,11 UP
FPC5_T->SIB-L4_F0,10    RESET      SIB-L4_F0,10->SIB-S4_F1,04 UP
FPC5_B->SIB-L4_F0,11    RESET      SIB-L4_F0,11->SIB-S4_F1,00 UP
FPC6_T->SIB-L4_F0,12    RESET      SIB-L4_F0,12->SIB-S4_F2,07 UP
FPC6_B->SIB-L4_F0,13    UP         SIB-L4_F0,13->SIB-S4_F2,03 UP
FPC7_T->SIB-L4_F0,14    RESET      SIB-L4_F0,14->SIB-S4_F1,12 UP
FPC7_B->SIB-L4_F0,15    RESET      SIB-L4_F0,15->SIB-S4_F1,08 UP
SIB4_F1  (F3 ):
SIB-S4_F0,00->SIB-L4_F1,00 UP      SIB-L4_F1,00->FPC7_B    UP
SIB-S4_F0,04->SIB-L4_F1,01 UP      SIB-L4_F1,01->FPC7_T    UP
SIB-S4_F3,11->SIB-L4_F1,02 UP      SIB-L4_F1,02->FPC6_B    UP
SIB-S4_F3,15->SIB-L4_F1,03 UP      SIB-L4_F1,03->FPC6_T    UP
SIB-S4_F0,08->SIB-L4_F1,04 UP      SIB-L4_F1,04->FPC5_B    UP
SIB-S4_F0,12->SIB-L4_F1,05 UP      SIB-L4_F1,05->FPC5_T    UP
SIB-S4_F3,03->SIB-L4_F1,06 UP      SIB-L4_F1,06->FPC4_B    UP
SIB-S4_F3,07->SIB-L4_F1,07 UP      SIB-L4_F1,07->FPC4_T    UP
SIB-S4_F1,00->SIB-L4_F1,08 UP      SIB-L4_F1,08->FPC3_B    UP
SIB-S4_F1,04->SIB-L4_F1,09 UP      SIB-L4_F1,09->FPC3_T    UP
SIB-S4_F2,11->SIB-L4_F1,10 UP      SIB-L4_F1,10->FPC2_B    UP
SIB-S4_F2,15->SIB-L4_F1,11 UP      SIB-L4_F1,11->FPC2_T    UP
SIB-S4_F1,08->SIB-L4_F1,12 UP      SIB-L4_F1,12->FPC1_B    UP
SIB-S4_F1,12->SIB-L4_F1,13 UP      SIB-L4_F1,13->FPC1_T    UP
SIB-S4_F2,03->SIB-L4_F1,14 UP      SIB-L4_F1,14->FPC0_B    UP
SIB-S4_F2,07->SIB-L4_F1,15 UP      SIB-L4_F1,15->FPC0_T    UP
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