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Configuring Channelized OC12/STM4 IQ and IQE Interfaces (SONET Mode)

This section describes how to configure channelized OC12/STM4 IQ and IQE interfaces, discussing the following topics:

Configuring an OC12/STM4 Interface

You can configure one OC12 interface on a one-port Channelized OC12/STM4 IQ or IQE PIC. On a 4-port OC12/STM4 IQ or IQE PIC, you can configure one OC12 interface per port. To configure an OC12 interface, include the no-partition and interface-type statements at the [edit interfaces coc12-fpc/pic/port] hierarchy level:

This configuration creates interface so-fpc/pic/port.

Note: Class-of-service (CoS) rules cannot be applied to an individual channel configured on channelized IQ and IQE interfaces. You can only apply CoS rules to the aggregate bit streams.

Configuring T3 Interfaces

To configure a T3 interface on an OC12 PIC, include the partition, oc-slice, and interface-type statements at the [edit interfaces coc12-fpc/pic/port] hierarchy level, specifying the coc1 interface type:

This configuration creates interface coc1-fpc/pic/port:channel.

Then, include the no-partition interface-type statement at the [edit interfaces coc1-fpc/pic/port:channel] hierarchy level, specifying the t3 interface type:

This configuration creates interface t3-fpc/pic/port:channel.

The partition number is the sublevel interface partition index and is correlated with the channel number. For channelized OC1 interfaces, the partition number can be from 1 through 12.

Note: For channelized OC12 interfaces, channel numbering begins with 0 (:0). For channelized OC12/STM4 IQ and IQE interfaces, channel numbering begins with 1 (:1).

The OC-slice range is the range of SONET/SDH slices. For SONET/SDH interfaces, the OC-slice range specifies the bandwidth size required for the interface type you are configuring. For channelized OC1 interfaces, the OC slice can be from 1 through 12. You can configure only one OC slice per channelized OC1 interface.

The interface type is the channelized interface type or clear channel you are creating. For channelized OC12 interfaces, type can be so or coc1.

Example: Configuring T3 Interfaces

Configure a T3 interface using partition 3 and OC slice 3. This configuration creates interface t3-1/1/0:3:

For a full configuration example, see the JUNOS Feature Guide.

Configuring OC3 Interfaces

To configure an OC3 interface, include the partition, oc-slice, and interface-type statements at the [edit interfaces coc12-fpc/pic/port] hierarchy level, specifying the so interface type:

The partition number is the sublevel interface partition index. For SONET/SDH interfaces, the partition number does not correlate with bandwidth size. For OC3 interfaces, the partition number can be from 1 through 4.

Note: For channelized OC12 interfaces, channel numbering begins with 0 (:0). For channelized OC12 IQ and IQE interfaces, channel numbering begins with 1 (:1).

The OC-slice range is the range of SONET/SDH slices. For SONET/SDH interfaces, the OC-slice range specifies the bandwidth size required for the interface type you are configuring. OC3 interfaces must occupy three consecutive OC slices per interface, in one of the following forms:

• 1–3
• 4–6
• 7–9
• 10–12

By contrast, the T3 and OC1 IQ interfaces each occupy one OC slice per interface.

The interface type is the channelized interface type or data channel you are creating. For channelized OC12 interfaces, the interface type can be coc1 or so.

Example: Configuring OC3 Interfaces

Configure an OC3 interface, using partition 1 and OC slices 4 through 6. This configuration creates interface so-1/1/0:1:

For a full configuration example, see the JUNOS Feature Guide.

Configuring T1 Interfaces

To configure T1 interfaces on a Channelized OC12 IQ or IQE PIC, perform the following tasks:

1. Partition the channelized OC12 interface into channelized OC1 interfaces by including the partition, oc-slice, and interface-type statements at the [edit interfaces coc12-fpc/pic/port] hierarchy level, specifying the coc1 interface type:

   [edit interfaces coc12-fpc/pic/port]

   partition partition-number oc-slice oc-slice-range interface-type coc1;

2. If your network equipment uses VT mapping, partition the channelized OC1 interface into T1 interfaces by including the partition and interface-type statements at the [edit interfaces coc1-fpc/pic/port] hierarchy level, specifying the t1 interface type:

   [edit interfaces coc1-fpc/pic/port]

   partition partition-number interface-type t1;

3. If your network equipment uses M13 or C-bit parity, convert the channelized OC1 interface into a channelized T3 interface by including the no-partition and interface-type statements at the [edit interfaces coc1- fpc/pic/port:channel] hierarchy level, specifying the ct3 interface type. Note that because the no-partition statement is included, this configuration does not create another level of channelization, as denoted by the number of colons in the resulting interface.

   [edit interfaces coc1-fpc/pic/port]

   partition-number interface-type ct3;

4. Partition the channelized T3 interface into T1 interfaces by including the partition and interface-type statements at the [edit interfaces ct3-fpc/pic/port] hierarchy level, specifying the t1 interface type:

   [edit interfaces ct3-fpc/pic/port]

   partition partition-number interface-type t1;

   Note: Class-of-service (CoS) rules cannot be applied to an individual channel configured on channelized IQ interfaces. You can only apply CoS rules to the aggregate bit streams.

Figure 1 shows VT-mapped and M13 or C-bit parity-mapped configurations of T1 interfaces.

Figure 1: T1 Interfaces on a Channelized OC12 PIC

Example: Configuring T1 Interfaces

Configure the following T1 interfaces:

For a full configuration example, see the JUNOS Feature Guide.

Configuring NxDS0 Interfaces

To configure NxDS0 interfaces on a Channelized OC12 IQE PIC, perform the following tasks:

1. Partition the channelized OC12 IQE interface into channelized OC1 interfaces by including the partition, oc-slice, and interface-type statements at the [edit interfaces coc12-fpc/pic/port] hierarchy level, specifying the coc1 interface type:

   [edit interfaces coc12-fpc/pic/port]

   partition partition-number oc-slice oc-slice-range interface-type coc1;

2. If your network equipment uses VT mapping, partition the channelized OC1 interface into channelized T1 interfaces by including the partition and interface-type statements at the [edit interfaces coc1-fpc/pic/port] hierarchy level, specifying the ct1 interface type:

   [edit interfaces coc1-fpc/pic/port]

   partition partition-number interface-type ct1;

   Note: Class-of-service (CoS) rules cannot be applied to an individual channel configured on channelized IQ interfaces. You can only apply CoS rules to the aggregate bit streams.

3. If your network equipment uses M13 or C-bit parity, convert the channelized OC1 interface into a channelized T3 interface by including the no-partition and interface-type statements at the [edit interfaces coc1-fpc/pic/port] hierarchy level, specifying the ct3 interface type:

   [edit interfaces coc1-fpc/pic/port]

   partition-number interface-type ct3;

   Note: Because the no-partition statement is included, this configuration task does not create another level of channelization, as denoted by the number of colons in the resulting interface.

4. Partition the channelized T3 interface into channelized T1 interfaces by including the partition and interface-type statements at the [edit interfaces ct3-fpc/pic/port] hierarchy level, specifying the ct1 interface type:

   [edit interfaces ct3-fpc/pic/port]

   partition partition-number interface-type ct1;

5. Configure channelized NxDS0 IQ interfaces on the channelized T1 IQ interface by including the partition, timeslots, and interface-type statements at the [edit interfaces ct1-fpc/pic/port] hierarchy level, specifying the ds interface type:

   [edit interfaces ct1-fpc/pic/port:channel:channel]

   partition partition-number timeslots time-slot-range interface-type ds;

Figure 2 shows VT-mapped and M13 or C-bit parity-mapped configurations of NxDS0 IQ interfaces.

Figure 2: Sample Channelization of OC12 IQE PIC

Example: Configuring NxDS0 Interfaces

Configure the following two NxDS0 interfaces with 10 time slots and 4 time slots, respectively:

For a full configuration example, see the JUNOS Feature Guide.

Configuring Fractional T1 Interfaces

By default, all the time slots on a channelized T1 interface are used. To configure a fractional T1 interface on a Channelized OC12 IQE PIC, perform the following tasks:

1. Configure a T1 interface. For more information, see .
2. Configure the number of time slots allocated to the T1 interface by including the timeslots statement at the [edit interfaces t1-fpc/pic/port<:channel> t1-options] hierarchy level:

   [edit interfaces t1-fpc/pic/port<:channel> t1-options]

   timeslots time-slot-range;

For channelized T1 interfaces, the time-slot range is from 1 through 24. You can designate any combination of time slots. To configure ranges, use hyphens. To configure discontinuous time slots, use commas. Do not include spaces. For more information, see Configuring Fractional T1 Time Slots.

Example: Configuring Fractional T1 Interfaces

Configure a fractional T1 interface that uses time slots 1 through 5 and 10:

For a full configuration example, see the JUNOS Feature Guide.