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Configuring Channelized STM1 IQ and IQE Interfaces

 

This section includes the following topics:

Configuring an STM1 IQ or STM1 IQE Interface

On a one-port Channelized STM1 IQ PIC, or each individual port of the 4-port Channelized STM1 IQE PIC, you can configure one SDH STM1 interface. To configure an SDH STM1 interface, include the no-partition interface-type statement at the [edit interfaces cstm1-fpc/pic/port] hierarchy level, specifying the so interface type:

This configuration creates interface so-fpc/pic/port.

Note

Class-of-service (CoS) rules cannot be applied to an individual channel configured on channelized IQ and IQE interfaces. You can only apply CoS rules to the aggregate bit streams.

Configuring E1 IQ and IQE Interfaces

To configure an E1 interface on a Channelized STM1 IQ or IQE PIC, perform the following tasks:

  1. Include the no-partition and interface-type statements at the [edit interfaces cstm1-fpc/pic/port] hierarchy level, specifying the cau4 interface type. This converts the channelized STM1 interface into a channelized AU-4 interface. The resulting interface name is cau4-fpc/pic/port:

  2. Partition the channelized AU-4 interface into E1 interfaces by including the partition and interface-type statements at the [edit interfaces cau4-fpc/pic/port] hierarchy level, specifying the e1 interface type. This configuration creates interface e1-fpc/pic/port:channel. The partition number is the sublevel interface partition index and is correlated with the channel number. For channelized E1 interfaces, the partition number can be from 1 through 63. The interface type is the channelized interface type or clear channel you are creating. For channelized AU-4 interfaces, type can be ce1 or e1.

Note

Class-of-service (CoS) rules cannot be applied to an individual channel configured on channelized IQ or IQE interfaces. You can only apply CoS rules to the aggregate bit streams.

Note

For channelized STM1 interfaces, channel numbering begins with 0 (:0). For channelized STM1 IQ and IQE interfaces, channel numbering begins with 1 (:1).

Example: Configuring E1 IQ and IQE Interfaces

Configure the following five E1 interfaces:

e1-0/0/0:1

e1-0/0/0:2

e1-0/0/0:3

e1-0/0/0:4

e1-0/0/0:5

Configuring Fractional E1 IQ and IQE Interfaces

By default, all the time slots on a channelized E1 interface are used. To configure a fractional E1 interface on a Channelized STM1 IQ or IQE PIC, perform the following tasks:

  1. Include the no-partition and interface-type statements at the [edit interfaces cstm1-fpc/pic/port] hierarchy level, specifying the cau4 interface type. This converts the channelized STM1 interface into a channelized AU-4 interface. The resulting interface name is cau4-fpc/pic/port:

  2. Partition the channelized AU-4 interface into E1 interfaces by including the partition and interface-type statements at the [edit interfaces cau4-fpc/pic/port] hierarchy level, specifying the e1 interface type. The partition number is the sublevel interface partition index and is correlated with the channel number. For channelized E1 interfaces, the partition number can be from 1 through 63. The interface type is the channelized interface type or clear channel you are creating. For channelized AU-4 interfaces, type can be ce1 or e1. This configuration creates interface e1-fpc/pic/port:channel:

  3. Configure the number of time slots allocated to the E1 IQ or IQE interface by including the timeslots statement at the [edit interfaces e1-fpc/pic/port:channel e1-options] hierarchy level. NxDS0 time slots configured on either a channelized STM1 IQ or IQE interface or channelized E1 IQ or IQE interface are numbered from 1 to 31 (0 is reserved), while fractional E1 time slots range from 2 to 32 (1 is reserved). To configure ranges, use hyphens. To configure discontinuous time slots, use commas. Do not include spaces.

Note

For channelized STM1 interfaces, channel numbering begins with 0 (:0). For channelized STM1 IQ or IQE interfaces, channel numbering begins with 1 (:1).

For more information about E1 time slots, see Configuring Fractional E1 Time Slots.

Example: Configuring Fractional E1 Interfaces

Configure a fractional E1 interface that uses time slots 2 through 10:

Configuring an NxDS0 IQ Interface

By default, all the time slots on a channelized STM1 interface are used. To configure an NxDS0 IQ interface on a Channelized STM1 IQ or IQE PIC, perform the following tasks:

  1. Include the no-partition and interface-type statements at the [edit interfaces cstm1-fpc/pic/port] hierarchy level, specifying the cau4 interface type. This converts the channelized STM1 interface into a channelized AU-4 interface. The resulting interface name is cau4-fpc/pic/port:

  2. Partition the channelized AU-4 interface into E1 interfaces by including the partition and interface-type statements at the [edit interfaces cau4-fpc/pic/port] hierarchy level, specifying the ce1 interface type. This configuration creates interface ce1-fpc/pic/port:channel. The partition number is the sublevel interface partition index and is correlated with the channel number. For channelized E1 interfaces, the partition number can be from 1 through 63. The interface type is the channelized interface type or clear channel you are creating. For channelized AU-4 interfaces, type can be ce1 or e1:

  3. Configure the number of time slots allocated to the NxDS0 IQ interface by including the partition, timeslots, and interface-type statements at the [edit interfaces e1-fpc/pic/port:channel] hierarchy level, specifying the ds interface type. For channelized E1 IQ interfaces, the partition number range is from 1 through 31. For E1 IQ interfaces (e1-fpc/pic/port), the time-slot range is from 2 through 31. For channelized E1 IQ interfaces (ce1-fpc/pic/port), the time-slot range is from 1 through 31. You can designate any combination of time slots. To configure ranges, use hyphens. To configure discontinuous time slots, use commas. Do not include spaces:

Note

Class-of-service (CoS) rules cannot be applied to an individual channel configured on channelized IQ and IQE interfaces. You can only apply CoS rules to the aggregate bit streams.

Note

For channelized STM1 interfaces, channel numbering begins with 0 (:0). For channelized STM1 IQ and IQE interfaces, channel numbering begins with 1 (:1).

For more information about E1 time slots, see Configuring Fractional E1 Time Slots.

Example: Configuring an NxDS0 IQ Interface

Configure an NxDS0 interface that uses time slots 1 through 10. This configuration creates the ds-0/0/0:1:1 interface.

Example: Configuring Channelized STM1 IQ and IQE Interfaces

Configure STM1, E1, fractional E1, and NxDS0 interfaces:

STM1 Interface

E1 Interface

Fractional E1 Interface

DS0 Interface