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Configuring 100-Gigabit Ethernet MICs/PICs

 

You can learn about the 100-Gigabit Ethernet MICs and PICs in this topic. You can configure interoperability between two 100-Gigabit Ethernet PICs.

100-Gigabit Ethernet Interfaces Overview

MX Series 100-Gigabit Ethernet Interfaces

Table 1 lists the 100-Gigabit Ethernet interfaces supported by MX Series routers.

Table 1: MX Series 100-Gigabit Ethernet Interfaces

Interface Module

Model Number

Routers Supported

For More Information

100-Gigabit Ethernet MIC with CFP

MIC3-3D-1X100GE-CFP

MX240

MX480

MX960

MX2010

MX2020

100-Gigabit Ethernet MIC with CFP

MPC3E MIC Overview

100-Gigabit Ethernet MIC with CXP

MIC3-3D-1X100GE-CXP

MX240

MX480

MX960

MX2010

MX2020

100-Gigabit Ethernet MIC with CXP

MPC3E MIC Overview

100-Gigabit Ethernet ports on the MPC4E

MPC4E-3D-2CGE-8XGE

MX240

MX480

MX960

MX2010

MX2020

MPC4E on MX Series Routers Overview

2x100GE + 8x10GE MPC4E

100-Gigabit Ethernet MIC with CFP2

MIC6-100G-CFP2

MX2010

MX2020

100-Gigabit Ethernet MIC with CFP2

100-Gigabit Ethernet MIC with CXP (4 Ports)

MIC6-100G-CXP

MX2010

MX2020

100-Gigabit Ethernet MIC with CXP (4 Ports)

PTX Series 100-Gigabit Ethernet Interfaces

Table 2 lists the 100-Gigabit Ethernet interfaces supported by PTX Series routers.

Table 2: PTX Series 100-Gigabit Ethernet Interfaces

PIC

Model Number

Routers Supported

For More Information

100-Gigabit Ethernet PIC with CFP

P1-PTX-2-100GE-CFP

PTX5000

100-Gigabit Ethernet PIC with CFP (PTX Series)

100-Gigabit Ethernet PIC with CFP2

P2-100GE-CFP2

PTX5000

100-Gigabit Ethernet PIC with CFP2 (PTX Series)

100-Gigabit Ethernet OTN PIC

P2-100GE-OTN

PTX5000

100-Gigabit Ethernet OTN PIC with CFP2 (PTX Series)

Understanding the P2-100GE-OTN PIC

Configuring OTN Interfaces on P2-100GE-OTN PIC

100-Gigabit DWDM OTN PIC

P1-PTX-2-100G-WDM

PTX5000

PTX3000

100-Gigabit DWDM OTN PIC (PTX Series)

T Series 100-Gigabit Ethernet Interfaces

Table 3 lists the 100-Gigabit Ethernet interfaces supported by T Series routers.

Table 3: T Series 100-Gigabit Ethernet Interfaces

PIC

Model Number

Routers Supported

For More Information

100-Gigabit Ethernet PIC with CFP (Type 4)

PD-1CE-CFP-FPC4

T1600

T4000

100-Gigabit Ethernet PIC with CFP (T1600 Router)

100-Gigabit Ethernet PIC with CFP (T4000 Router)

100-Gigabit Ethernet Type 4 PIC with CFP Overview

Configuring 100-Gigabit Ethernet Type 4 PIC With CFP

100-Gigabit Ethernet PIC with CFP (Type 5)

PF-1CGE-CFP

T4000

100-Gigabit Ethernet PIC with CFP (T4000 Router)

100-Gigabit Ethernet Type 5 PIC with CFP Overview

MPC3E MIC Overview

The MPC3E supports two separate slots for MICs. MICs provide the physical interface and are installed into the MPCs.

The MPC3E supports these MICs as field replaceable units (FRUs):

The MPC3E has two separate configurable MIC slots. Each MIC corresponds to a single PIC and the mapping between the MIC and PIC is 1 to 1 (one MIC is treated as one PIC). The MIC plugged into slot 0 corresponds to PIC 0 and the MIC plugged into slot 1 corresponds to PIC 2.

The MPC3E also supports these legacy MICs:

The 100-Gigabit Ethernet CFP MIC supports the IEEE standards—compliant 100BASE-LR4 interface, using the 100G CFP optical transceiver modules for connectivity. The 100-Gigabit Ethernet CXP MIC supports the 100BASE-SR10 interface, using 100-Gigabit CXP optical transceiver modules for connectivity. The 2-port 40-Gigabit Ethernet QSFPP MIC supports the 40BASE-SR4 interface and uses quad small form-factor pluggable (QSFPP) optical transceivers for connectivity. The 10-port 10-Gigabit Ethernet SFPP MIC uses SFP+ optical transceiver modules for connectivity.

For detailed information about each MIC, see 100-Gigabit Ethernet MIC with CFP, 100-Gigabit Ethernet MIC with CXP, 40-Gigabit Ethernet MIC with QSFP+. For information about supported hardware and transceivers, see MPC3E.

The MPC3E supports these features:

  • Optical diagnostics and related alarms

  • Virtual Router Redundancy Protocol (VRRP) support

  • IEEE 802.1Q virtual LANs (VLANs) support

  • Synchronous Ethernet

  • Remote monitoring (RMON) and Ethernet statistics (EtherStats)

  • Source MAC learning

  • MAC accounting and policing—Dynamic local address learning of source MAC addresses

  • Flexible Ethernet encapsulation

  • Multiple Tag Protocol Identifiers (TPIDs)

Note

The MPC3E supports Ethernet interfaces only. SONET interfaces are not supported.

For information about the supported and unsupported Junos OS features for this MPC, see “Protocols and Applications Supported by the MPC3E (MX-MPC3E)” in the MX Series Interface Module Reference.

100-Gigabit Ethernet Type 4 PIC with CFP Overview

The 100-Gigabit Ethernet PIC (model number PD-1CE-CFP-FPC4) is a 1-port 100-Gigabit Ethernet Type 4 PIC with 100-gigabit small form-factor pluggable (CFP) transceiver. This PIC is available only as packaged in an assembly with the T1600-FPC4-ES FPC. The 100-Gigabit Ethernet PIC occupies PIC slots 0 and 1 in the T1600-FPC4-ES FPC. For information about supported transceivers and hardware, see 100-Gigabit Ethernet PIC with CFP (T1600 Router).

The 100-Gigabit Ethernet PIC supports flexible encapsulation and MAC accounting.

MAC learning, MAC policing, and Layer 2 rewrite functionality are not supported.

The ingress flow can be filtered based on the VLAN source and destination addresses. Ingress frames can also be classified according to VLAN, stacked VLAN, source address, VLAN source address, and stacked VLAN source address. VLAN manipulation on egress frames are supported on both outer and inner VLAN tags.

The following features are supported:

  • The following encapsulation protocols are supported:

    • Layer 2 protocols

      • Ethernet CCC, Ethernet TCC, Ethernet VPLS

      • VLAN CCC

      • Extended VLAN TCC

      • VLAN VPLS

      • Flexible Ethernet service

    • Layer 3 protocols

      • IPv4

      • Ipv6

      • MPLS

  • CFP MSA compliant MDIO control features (transceiver dependent).

  • Graceful Routing Engine switchover (GRES) is supported in all PIC and chassis configurations.

  • Interface creation:

    • When the PIC, is brought online, the router creates two 50 gigabit capable interfaces, et-x/0/0:0 and et-x/0/0:1, where x represents the FPC slot number. Each physical interface represents two internal 50 gigabit Ethernet Packet Forwarding Engines. Two logical interfaces are configured under each physical interface.

    • Packet Forwarding Engine 0 is physical interface 0, Packet Forwarding Engine 1 is physical interface 1

  • 802.3 link aggregation:

    Same rate or same mode link aggregation:

    • Two logical interfaces are created for each 100-Gigabit Ethernet PIC. To utilize bandwidth beyond 50 gigabits per second, an aggregate interface must be explicitly configured on the 100-Gigabit Ethernet PIC that includes the two 50 gigabit interfaces.

    • Each 100 gigabit Ethernet aggregate consumes one of the router-wide aggregated Ethernet device pools. The number of 100-Gigabit Ethernet PICs cannot exceed the router-wide limit, which is 128 for Ethernet.

    • In each aggregate bundle, each 100-Gigabit Ethernet PIC consumes two members. Hence, an aggregate bundle that consists purely of 100-Gigabit Ethernet PICs supports a maximum of half of the software limit for the number of members. Therefore, with a maximum of 16 links, up to 8 100-Gigabit Ethernet links are supported.

    • Combining 100-Gigabit Ethernet PICs into aggregate interfaces with other Ethernet PICs is not permitted. However, other Ethernet PICs can also be configured within the same T1600 with 100-Gigabit Ethernet PICs, and used in separate aggregate interfaces.

    • Multiple (Juniper Networks) Type 4 100-Gigabit Ethernet PICs on a T1600 router can be combined into a static aggregated Ethernet bundle to connect to a different type of 100 gigabit Ethernet PIC on a remote router (Juniper Networks or other vendors). LACP is not supported in this configuration.

    Mixed rate or mixed mode link aggregation:

    • Starting with Junos OS Release 13.2, aggregated Ethernet supports mixed rates and mixed modes on 100-Gigabit Ethernet PIC.

    • Static link protection and Link Aggregation Control Protocol (LACP) is supported on mixed aggregated Ethernet link configured on a 100-Gigabit Ethernet PIC.

    • When configuring a mixed aggregated Ethernet link on a 100-Gigabit Ethernet PIC, ensure that you add both the 50-Gigabit Ethernet interfaces of the 100-Gigabit Ethernet PIC to the aggregated Ethernet bundle. Moreover, both these 50-Gigabit Ethernet interfaces must be included in the same aggregated Ethernet bundle.

    • For a single physical link event of an aggregated Ethernet link configured on a 100-Gigabit Ethernet PIC, the packet loss performance value is twice the original value because of the two 50-Gigabit Ethernet interfaces of the 100-Gigabit Ethernet PIC.

  • Software Packet Forwarding Engine—Supports all Gigabit Ethernet PIC classification, firewall filter, queuing model, and rewrite functionality.

  • Egress traffic performance—Maximum egress throughput is 100 gigabits per second on the physical interface, with 50 gigabits per second on the two assigned logical interfaces.

  • Ingress traffic performance—Maximum ingress throughput is 100 gigabits per second on the physical interface, with 50 gigabits per second on the two assigned logical interfaces. To achieve 100 gigabits per second ingress traffic performance, use one of the interoperability modes described below. For example, if VLAN steering mode is not used when connecting to a remote 100 gigabits per second interface (that is on a different 100 gigabits per second PIC on a Juniper Networks router or a different vendor’s equipment), then all ingress traffic will try to use one of the 50 gigabits per second Packet Forwarding Engines, rather than be distributed among the two 50 gigabits per second Packet Forwarding Engines, resulting in a total of 50 gigabits per second ingress performance.

  • Interoperability modes—The 100-Gigabit Ethernet PIC supports interoperability with through configuration in one of the following two forwarding option modes:

    • SA multicast mode—In this mode, the 100-Gigabit Ethernet PIC supports interconnection with other Juniper Networks 100-Gigabit Ethernet PICs (Model: PD-1CE-CFP) interfaces only.

    • VLAN steering mode—In this mode, the 100-Gigabit Ethernet Type 4 PIC with CFP supports interoperability with 100 gigabit Ethernet interfaces from other vendors only.

Configuring 100-Gigabit Ethernet Type 4 PIC With CFP

You can configure the following features on the 100-Gigabit Ethernet Type 4 PIC with CFP (PD-1CE-CFP-FPC4):

  • Flexible Ethernet services encapsulation

  • Source address MAC filtering

  • Destination address MAC filtering

  • MAC accounting in RX

  • Channels defined by two stacked VLAN tags

  • Channels defined by flex-vlan-tagging

  • IP service for stacked VLAN tags

  • Layer 2 rewrite

The following features are not supported on the 100-Gigabit Ethernet Type 4 PIC with CFP:

  • Multiple TPID

  • IP service for non-standard TPID

  • MAC learning

  • MAC policing

Note
  • For the 100-Gigabit Ethernet Type 4 PIC with CFP, only the PIC0 online and offline CLI commands are supported. The PIC1 online and offline CLI commands are not supported.

  • Each 100-Gigabit Ethernet Type 4 PIC with CFP creates two et- physical interfaces, defined as 50-gigabit physical interfaces in the Routing Engine and Packet Forwarding Engine. By default, these are independent physical interfaces and are not configured as an aggregated Ethernet interface.

To configure a 100-Gigabit Ethernet Type 4 PIC with CFP:

  1. Perform the media configuration:

    The 100-Gigabit Ethernet Type 4 PIC with CFP features a 100 gigabit per second pipe. The media-related configuration commands for et-x/0/0:0 and et-x/0/0:1 must both be configured at the same time and configured with the same value, otherwise the commit operation fails.

    When configuring to activate or deactivate the interface, if the interface contains the described media-related configuration, it must activate and deactivate both units 0 and 1 at the same time, otherwise the commit operation fails.

    The following media configuration commands have the above described restriction:

    • # set interfaces et-x/0/0:1 disable

    • # set interfaces et-x/0/0:1 gigether-options loopback

    • # set interfaces et-x/0/0:1 mtu yyy

    Due to an MTU restriction, the vlan-tagging and flexible-vlan-tagging configuration on et-x/0/0:0 and et-x/0/0:1 must be same, otherwise the commit operation fails.

  2. Specify the logical interfaces:
    1. Two physical interfaces are created when the 100-Gigabit Ethernet Type 4 PIC with CFP is brought online (et-x/0/0:0 and et-x/0/0:1, where x represents the FPC slot number). Each physical interface represents two internal 50-gigabit Ethernet Packet Forwarding Engines.

    2. Two logical interfaces are configured under each physical interface: Packet Forwarding Engine 0 is physical interface 0 and Packet Forwarding Engine 1 is physical interface 1.

  3. Configure the 802.3 link aggregation:
    1. The 100-Gigabit Ethernet PIC supports aggregated Ethernet configuration to achieve higher throughput capability, whereby configuration is similar to the 1G/10G aggregated Ethernet interface configuration.

    2. Two physical interfaces are created for each 100-Gigabit Ethernet Type 4 PIC with CFP. To utilize bandwidth beyond 50 gigabits, a same rate and same mode aggregated Ethernet interface must be explicitly configured on the 100-Gigabit Ethernet Type 4 PIC with CFP that includes these two 50-gigabit interfaces.

    3. Each 100-Gigabit Ethernet Type 4 PIC with CFP aggregate consumes one of the router-wide aggregated Ethernet device pools. In Junos OS with 100-Gigabit Ethernet PICs, you cannot exceed the router limit of 128 Ethernet PICs.

    4. In each aggregated bundle, each 100-Gigabit Ethernet Type 4 PIC with CFP consumes two aggregate members. Hence, an aggregated bundle consisting of only one 100-Gigabit Ethernet Type 4 PIC with CFP supports only up to half of the Junos OS limit for the number of members. The Junos OS supports a maximum of 16 links for up to 8 100-Gigabit Ethernet Type 4 PIC with CFP links.

      Note

      The 100-Gigabit Ethernet Type 4 PIC with CFP has the following restrictions for same rate and same mode aggregated Ethernet configuration:

      • Both physical interfaces belonging to the same 100-Gigabit Ethernet PIC must be included in the same aggregated Ethernet physical interfaces. The aggregation of the 100-Gigabit Ethernet PIC interface is always an even number of physical interfaces.

      • The 100-Gigabit Ethernet PIC physical interface cannot be configured in the aggregated interface with any other type of physical interface.

      • The maximum supported number of aggregated 100-Gigabit Ethernet PIC interfaces is half of the number that the Junos OS supports for 1G/10G aggregated Ethernet. For example, if Junos OS supports 16 ports of 10-gigabit Ethernet aggregation, it supports 8 ports of 100-Gigabit Ethernet PIC aggregation. This is because each port of the 100-Gigabit Ethernet PIC port using 2 physical interfaces (et-x/0/0:0 and et-x/0/0:1), where each physical interface represents 50 gigabits of traffic capacity.

    5. Starting with Junos OS Release 13.2, aggregated Ethernet supports mixed rates and mixed modes on 100-Gigabit Ethernet PIC. When configuring a mixed aggregated Ethernet link on a 100-Gigabit Ethernet PIC, ensure that you add both the 50-Gigabit Ethernet interfaces of the 100-Gigabit Ethernet PIC to the aggregated Ethernet bundle. Moreover, both these 50-Gigabit Ethernet interfaces must be included in the same aggregated Ethernet bundle.

    Note

    The 100-Gigabit Ethernet Type 4 PIC with CFP has the following restrictions for mixed rate and mixed mode aggregated Ethernet configuration:

    • A maximum of 16 member links can be configured to form a mixed aggregated Ethernet link.

    • Traffic distribution is based on the hash calculated on the egress packet header. Hash range is fairly distributed according to member links’ speed. This guarantees hash fairness but it does not guarantee fair traffic distribution depending on the rate of the egress streams.

    • Packets are dropped when the total throughput of the hash flow exiting a member link (or multiple hash flows exiting a single member link) exceeds the link speed of the member link. This can happen when egress member link changes because of a link failure and the hash flow switches to a member link of speed that is less than the total throughput of the hash flow.

    • Rate-based CoS components such as scheduler, shaper, and policer are not supported on mixed rate aggregated Ethernet links. However, the default CoS settings are supported by default on the mixed rate aggregated Ethernet links.

    • Load balancing is performed at the ingress Packet Forwarding Engine. Therefore, you must ensure that the egress traffic on the aggregated Ethernet link enters through the hardware platforms that support mixed aggregated Ethernet bundles.

    • Mixed aggregated Ethernet links can interoperate with non-Juniper Networks aggregated Ethernet member links provided that mixed aggregated Ethernet load balancing is configured at egress.

    • Load balancing of the egress traffic across the member links of a mixed rate aggregated Ethernet link is proportional to the rates of the member links.

    • Egress multicast load balancing is not supported on mixed aggregated Ethernet interfaces.

    • Changing the edit interfaces aex aggregated-ether-options link-speed configuration of a mixed aggregated Ethernet link, which is configured on the supported interfaces of on T640, T1600, T4000, and TX Matrix Plus routers, leads to aggregated Ethernet link flapping.

    • When a mixed aggregated Ethernet link is configured on a 100-Gigabit Ethernet PIC, changing aggregated Ethernet link protection configurations leads to aggregated Ethernet link flapping.

    • For a single physical link event of an aggregated Ethernet link configured on a 100-Gigabit Ethernet PIC, the packet loss performance value is twice the original value because of the two 50-Gigabit Ethernet interfaces of the 100-Gigabit Ethernet PIC with CFP.

    • The show interfaces aex command displays the link speed of the aggregated Ethernet interface, which is the sum of the link speeds of all the active member links.

  4. Configure the Packet Forwarding Engine features:
    1. The 100-Gigabit Ethernet Type 4 PIC with CFP supports all classification, firewall filters, queuing model, and rewrite functionality features of the Gigabit Ethernet PICs. To configure these parameters, see Configuring Gigabit Ethernet Policers, Configuring Gigabit Ethernet Policers, and Stacking and Rewriting Gigabit Ethernet VLAN Tags Overview.

Note

When using the show interfaces extensive command with a 100-Gigabit Ethernet Type 4 PIC with CFP, the “Filter statistics” section will not be displayed because the hardware does not include those counters.

Configuring VLAN Steering Mode for 100-Gigabit Ethernet Type 4 PIC with CFP

In Junos OS Release 10.4 and later, you can configure the 100-Gigabit Ethernet Type 4 PIC with CFP (PD-1CE-CFP-FPC4) to interoperate with routers using 100 gigabit Ethernet interfaces from other vendors by using the forwarding-mode statement with the vlan-steering option at the [edit chassis fpc slot pic slot] hierarchy level. On ingress, the router compares the outer VLAN ID against the user-defined VLAN ID and VLAN mask combination and steers the packet accordingly. You can program a custom VLAN ID and corresponding mask for PFE0.

General information on the VLAN steering mode:

  • In VLAN steering mode, the SA multicast parameters are not used for packet steering.

  • In SA multicast bit steering mode, the VLAN ID and VLAN masks are not used for packet steering.

  • Configuration to set the packet distribution mode and VLAN steering rule is done through CLI commands. Both CLI commands result in a PIC reboot.

  • There are three possible tag types of ingress packet:

    • Untagged ingress packet—The packet is sent to PFE1.

    • Ingress packet with one VLAN—The packet is forwarded to the corresponding PFE based on the VLAN ID.

    • Ingress packet with two VLANs—The packet is forwarded to the corresponding PFE based on the outer VLAN ID.

  • If no VLAN rule is configured, all tagged packets are distributed to PFE0.

  • VLAN rules describe how the router distributes packets. Two VLAN rules are provided by the CLI:

    • Odd-Even rule—Odd number VLAN IDs go to PFE1; even number of VLAN IDs go to PFE0.

    • Hi-Low rule—VLAN IDs 1 through 2047 go to PFE0; VLAN IDs 2048 through 4096 go to PFE1.

  • When the 100-Gigabit Ethernet Type 4 PIC with CFP is configured in VLAN steering mode, it can be configured in a two physical interfaces mode or in aggregate Ethernet (AE) mode:

    • Two physical interfaces mode—When the PIC is in the two physical interfaces mode, it creates the physical interfaces et-x/0/0:0 and et-x/0/0:1. Each physical interface can configure its own logical interface and VLAN. The CLI enforces the following restrictions at the commit time:

      • The VLAN ID configuration must comply with the selected VLAN rule.

      • The previous restriction implies that the same VLAN ID cannot be configured on both physical interfaces.

    • AE mode—When the PIC is in aggregated Ethernet mode, the two physical interfaces on the same PIC are aggregated into one AE physical interface. The PIC egress traffic is based on an AE internal hash algorithm. The PIC ingress traffic steering is based on the customized VLAN ID rule. The CLI enforces the following restrictions at the commit time:

      • The PICs AE working in VLAN steering mode includes both links of that PIC, and only the links of that PIC.

      • The PIC AE working in SA multicast steering mode can include more than one 100-Gigabit Ethernet Type 4 PIC with CFP to achieve more than 100 gigabit Ethernet capacity.

To configure SA multicast mode, use the set chassis fpc slot pic slot forwarding-mode sa-multicast command.

SA Multicast Mode

To configure SA multicast mode on a Juniper Networks 100-Gigabit Ethernet Type 4 PIC with CFP in FPC 0, PIC 0 for interconnection with another Juniper Networks 100-Gigabit Ethernet PIC, use the set chassis fpc slot pic slot forwarding-mode sa-multicast command. You can use the show forwarding-mode command to view the resulting configuration, as follows:

VLAN Steering Mode

To configure the Juniper Networks 100-Gigabit Ethernet Type 4 PIC with CFP for VLAN steering mode for interoperation with a 100 gigabit Ethernet interface from another vendor’s router, use the set chassis fpc slot pic slot forwarding-mode vlan-steering command with the vlan-rule (high-low | odd-even) statement. You can use the show forwarding-mode command to view the resulting configuration, as follows:

100-Gigabit Ethernet Type 5 PIC with CFP Overview

The 100-Gigabit Ethernet PIC is a 1-port 100-Gigabit Ethernet Type 5 PIC with C form-factor pluggable transceiver (CFP) with model number PF-1CGE-CFP.

The following features are supported on 100-Gigabit Ethernet Type 5 PIC with CFP:

  • Access to all 100-Gigabit Ethernet port counters through SNMP.

  • Logical interface–level MAC filtering, accounting, policing, and learning for source media access control (MAC).

  • Channels defined by two stacked VLAN tags.

  • Channels defined by flex-vlan-tagging.

  • IP service for stacked VLAN tags.

  • Defining the rewrite operation to be applied to the incoming and outgoing frames on logical interfaces on this PIC.

    Note

    Only the Tag Protocol Identifier (TPID) 0x8100 is supported.

  • Interface encapsulations, such as the following:

    • untagged—Default encapsulation, when other encapsulation is not configured.

      • You can configure only one logical interface (unit 0) on the port.

      • You cannot include the vlan-id statement in the configuration of the logical interface.

    • vlan-tagging—Enable VLAN tagging for all logical interfaces on the physical interface.

    • stacked-vlan-tagging—Enable stacked VLAN tagging for all logical interfaces on the physical interface.

    • ethernet-ccc—Ethernet cross-connect.

    • ethernet-tcc—Ethernet translational cross-connect.

    • vlan-ccc—802.1Q tagging for a cross-connect.

    • vlan-tcc—Virtual LAN (VLAN) translational cross-connect.

    • extended-vlan-ccc—Standard TPID tagging for an Ethernet cross-connect.

    • extended-vlan-tcc—Standard TPID tagging for an Ethernet translational cross-connect.

    • flexible-ethernet-services—Allows per-unit Ethernet encapsulation configuration.

    • ethernet-vpls—Ethernet virtual private LAN service.

    • vlan-vpls—VLAN virtual private LAN service.

  • The following Layer 3 protocols are also supported:

    • IPv4

    • IPv6

    • MPLS

  • CFP Multi-Source Agreement (MSA) compliant Management Data Input/Output (MDIO) control features (transceiver dependent).

  • 802.3 link aggregation:

    • The configuration of the 100-Gigabit Ethernet Type 5 PIC with CFP complies with that of the existing 1-Gigabit or 10-Gigabit Ethernet PIC and aggregated Ethernet interfaces.

  • Interoperability mode—Interoperability with the 100-Gigabit Ethernet Type 4 PIC with CFP through configuration in sa-multicast forwarding mode.

  • Juniper Networks enterprise-specific Ethernet Media Access Control (MAC) MIB

  • The 100-Gigabit Ethernet Type 5 PIC with CFP supports all Gigabit Ethernet PIC classification, firewall filters, queuing model, and Layer 2 rewrite functionality features of the Gigabit Ethernet PICs. To configure these parameters, see Configuring Gigabit Ethernet Policers, Configuring Gigabit Ethernet Policers, and Stacking and Rewriting Gigabit Ethernet VLAN Tags Overview.

  • A Type 5 FPC can support up to two 100-Gigabit Ethernet PICs. Both the PICs (that is, PIC 0 and PIC 1) can be offline or online independently.

The following features are not supported on the 100-Gigabit Ethernet Type 5 PIC with CFP:

  • MAC filtering, accounting, and policing for destination MAC at the logical interface level.

    Note

    Because destination MAC filtering is not supported, the hardware is configured to accept all the multicast packets. This configuration enables the OSPF protocol to work.

  • Premium MAC policers at the logical interface level.

  • MAC filtering, accounting, and policing at the physical interface level.

  • Multiple TPIDs.

  • IP service for nonstandard TPID.

Table 4 lists the capabilities of 100-Gigabit Ethernet Type 5 PIC with CFP.

Table 4: Capabilities of 100-Gigabit Ethernet Type 5 PIC with CFP

Capability

Support

Maximum logical interfaces per PIC

4093

Maximum logical interfaces per port

For IPv4 the limit is 4093.

For IPv6 the limit is 1022.

100-Gigabit Ethernet Interfaces Interoperability

Juniper Networks Junos operating system (Junos OS) supports a variety of 100-Gigabit Ethernet interfaces. The 100-Gigabit Ethernet standard, introduced by IEEE 802.3ba-2010, enables transmission of Ethernet frames at the rate of 100 gigabits per second (Gbps). It is used for very high speed transmission of voice and data signals across the numerous world-wide fiber-optic networks.

Interface interoperability refers to the ability of an interface to interoperate with other router interfaces. You can enable interoperability between different 100-Gigabit Ethernet interfaces by performing specific configuration tasks. The following sections list the 100-Gigabit Ethernet interfaces, corresponding interoperable interfaces, and links to the interoperability tasks and reference information.

Interoperability of the MIC-3D-1X100GE-CFP MIC with PICs on Other Routers

Table 5 lists the Interoperability with the 100-Gigabit Ethernet MIC with CFP.

Table 5: 100-Gigabit Ethernet MIC with CFP (MIC3-3D-1X100GE-CFP) Interoperability

Interoperates with...

For More Information...

T Series

100-Gigabit Ethernet PIC with CFP (Type 4) (PD- 1CE-CFP-FPC4)

Configuring 100-Gigabit Ethernet MICs to Interoperate with Type 4 100-Gigabit Ethernet PICs (PD-1CE-CFP-FPC4) Using SA Multicast Mode

Interoperability of the MPC4E-3D-2CGE-8XGE MPC with PICs on Other Routers

Table 6 lists the Interoperability with the MPC4E.

Table 6: MPC4E Interoperability

Interoperates with...

For More Information...

T Series

100-Gigabit Ethernet PIC with CFP (Type 4) (PD-1CECFP- FPC4)

Configuring MPC4E (MPC4E-3D-2CGE-8XGE) to Interoperate with 100-Gigabit Ethernet PICs on Type 4 FPC Using SA Multicast Mode

Interoperability of the P1-PTX-2-100GE-CFP PIC with PICs on Other Routers

Table 7 lists the Interoperability with 100-Gigabit Ethernet PIC with CFP (Type 5).

Table 7: 100-Gigabit Ethernet PIC with CFP (Type 5) (P1-PTX-2-100GE-CFP) Interoperability

Interoperates with...

For More Information...

T Series

100-Gigabit Ethernet PIC with CFP (Type 4) (PD- 1CE-CFP-FPC4)

Interoperability Between the 100-Gigabit Ethernet PICs PD-1CE-CFP-FPC4 and P1-PTX-2-100GE-CFP

Configuring the Interoperability Between the 100-Gigabit Ethernet PICs P1-PTX-2-100GE-CFP and PD-1CE-CFP-FPC4

Interoperability of the PD-1CE-CFP-FPC4 PIC with PICs or MICs on Other Routers

Table 8 lists the 100-Gigabit Ethernet PIC with CFP (Type 4).

Table 8: 100-Gigabit Ethernet PIC with CFP (Type 4) PD-1CE-CFP-FPC4 Interoperability

Interoperates with...

For More Information...

T Series

100-Gigabit Ethernet PIC with CFP (Type 5) (PF- 1CGE-CFP)

Configuring the Interoperability Between the 100-Gigabit Ethernet PICs PF-1CGE-CFP and PD-1CE-CFP-FPC4

forwarding-mode

sa-multicast

MX Series

100-Gigabit Ethernet MIC with CFP (MIC3-3D- 1X100GE-CFP)

Configuring 100-Gigabit Ethernet MICs to Interoperate with Type 4 100-Gigabit Ethernet PICs (PD-1CE-CFP-FPC4) Using SA Multicast Mode

100-Gigabit Ethernet ports on the MPC4E

Configuring MPC4E (MPC4E-3D-2CGE-8XGE) to Interoperate with 100-Gigabit Ethernet PICs on Type 4 FPC Using SA Multicast Mode

PTX Series

100-Gigabit Ethernet PIC with CFP (Type 5) (P1- PTX-2-100GE-CFP)

Interoperability Between the 100-Gigabit Ethernet PICs PD-1CE-CFP-FPC4 and P1-PTX-2-100GE-CFP

Configuring the Interoperability Between the 100-Gigabit Ethernet PICs P1-PTX-2-100GE-CFP and PD-1CE-CFP-FPC4

Interoperability Between the 100-Gigabit Ethernet PICs PD-1CE-CFP-FPC4 and PF-1CGE-CFP

You can enable interoperability between the 100-Gigabit Ethernet PICs PD-1CE-CFP-FPC4 and PF-1CGE-CFP by:

  • Enabling source address (SA) multicast bit steering mode on the 100-Gigabit Ethernet PIC PF-1CGE-CFP.

  • Configuring the two 50-Gigabit Ethernet physical interfaces on the 100-Gigabit Ethernet PIC PD-1CE-CFP-FPC4 as one aggregated Ethernet physical interface.

SA multicast mode uses the multicast bit in the source MAC address for packet steering. By default, the SA multicast bit is set to 0 for all packets sent by the 100-Gigabit Ethernet PIC PF-1CGE-CFP. The 100-Gigabit Ethernet PIC PD-1CE-CFP-FPC4 looks at the bit and forwards the packets to either Packet Forwarding Engine 0 or Packet Forwarding Engine 1. When the PIC sends out a packet, the multicast bit is set based on the egress Packet Forwarding Engine number (0 or 1).

The default packet steering mode for PD-1CE-CFP-FPC4 is SA multicast bit mode. No SA multicast configuration is required to enable this mode.

PD-1CE-CFP-FPC4 uses two 50 Gpbs Packet Forwarding Engines to achieve 100 Gbps throughput. The 50-Gigabit Ethernet physical interfaces are created when the 100-Gigabit Ethernet PIC is plugged in. The two physical interfaces are visible and configuration is allowed on both the physical interfaces. You must configure the physical interfaces on PD-1CE-CFP-FPC4 in static link aggregation group (LAG) mode without enabling Link Aggregation Control Protocol (LACP). This ensures that a single 100-Gigabit aggregated interface is visible on the link connecting to the 100-Gigabit Ethernet PIC PF-1CGE-CFP instead of two independent 50-Gigabit Ethernet interfaces.

Note

If you try to enable the interoperability between the 100-Gigabit Ethernet PICs PD-1CE-CFP-FPC4 and PF-1CGE-CFP without configuring PD-1CE-CFP-FPC4 (with two 50-Gigabit Ethernet interfaces) in static LAG mode, then there are issues in forwarding or routing protocols. For example, if you create two untagged logical interfaces—one each on the two 50-Gigabit Ethernet interfaces—on PD-1CE-CFP-FPC4 and one untagged logical interface on PF-1CGE-CFP, then PF-1CGE-CFP does not learn about one of the 50-Gigabit Ethernet interfaces on PD-1CE-CFP-FPC4.

Configuring the Interoperability Between the 100-Gigabit Ethernet PICs PF-1CGE-CFP and PD-1CE-CFP-FPC4

You can enable interoperability between the 100-Gigabit Ethernet PICs PD-1CE-CFP-FPC4 and PF-1CGE-CFP by performing the following tasks:

Configuring SA Multicast Bit Steering Mode on the 100-Gigabit Ethernet PIC PF-1CGE-CFP

To enable the interoperability between the 100-Gigabit Ethernet PICs PD-1CE-CFP-FPC4 and PF-1CGE-CFP, you need to enable source address (SA) multicast bit steering mode on PF-1CGE-CFP.

To configure SA multicast mode on PF-1CGE-CFP:

  1. Specify the FPC and PIC information on the chassis.

    For example:

  2. Configure the interoperation mode (SA multicast bit steering mode).

    For example:

  3. Verify the configuration.
Note

The default packet steering mode for the 100-Gigabit Ethernet PIC PD-1CE-CFP-FPC4 is SA multicast bit mode. No SA multicast configuration is required to enable this mode.

Interoperability Between the 100-Gigabit Ethernet PICs PD-1CE-CFP-FPC4 and P1-PTX-2-100GE-CFP

You can enable interoperability between the 100-Gigabit Ethernet PIC PD-1CE-CFP-FPC4 and the 100-Gigabit Ethernet PIC P1-PTX-2-100GE-CFP by:

  • Configuring the two 50-Gigabit Ethernet physical interfaces on the 100-Gigabit Ethernet PIC PD-1CE-CFP-FPC4 as one aggregated Ethernet physical interface.

  • Configuring source address (SA) multicast bit steering mode on the 100-Gigabit Ethernet PIC P1-PTX-2-100GE-CFP.

SA multicast bit steering mode uses the multicast bit in the source MAC address for packet steering.

Note

When SA multicast bit steering mode is configured on a PTX Series Packet Transport Router 100-Gigabit Ethernet port, VLANs are not supported for that port.

The 100-Gigabit Ethernet PIC PD-1CE-CFP-FPC4 uses two 50-Gpbs Packet Forwarding Engines to achieve 100-Gbps throughput. The 50-Gigabit Ethernet physical interfaces are created when the 100-Gigabit Ethernet PIC is plugged in. The two physical interfaces are visible and configuration is allowed on both the physical interfaces. You must configure the physical interfaces on the 100-Gigabit Ethernet PIC PD-1CE-CFP-FPC4 in static link aggregation group (LAG) mode without enabling Link Aggregation Control Protocol (LACP). This ensures that a single 100-Gigabit aggregated interface is visible on the link connecting to the 100-Gigabit Ethernet PIC P1-PTX-2-100GE-CFP.

On the 100-Gigabit Ethernet PIC PD-1CE-CFP-FPC4, ingress packets are forwarded to either Packet Forwarding Engine number 0 or 1 based on the SA multicast bit in the received packet. The SA multicast bit of egress packets is set based on whether the packet is forwarded from Packet Forwarding Engine number 0 or 1. As the default packet steering mode is SA multicast bit steering mode, no configuration is necessary to enable this mode.

On the 100-Gigabit Ethernet PIC P1-PTX-2-100GE-CFP, the SA multicast bit is ignored in ingress packets. When SA multicast bit steering mode is enabled, the SA multicast bit in the egress packets is set to 0 or 1 based on the flow hash value that is computed internally by the Packet Forwarding Engine complex for each packet. No CLI configuration is required to generate the flow hash value as this computation is done automatically. The flow hash algorithm uses fields in the packet header to compute the flow hash value. By default, the SA multicast bit is set to 0 in egress packets. You must configure SA multicast bit steering mode to enable interoperability with the 100-Gigabit Ethernet PIC PD-1CE-CFP-FPC4 .

Note

If you try to enable the interoperability between the 100-Gigabit Ethernet PICs PD-1CE-CFP-FPC4 and P1-PTX-2-100GE-CFP without configuring PD-1CE-CFP-FPC4 (with two 50-Gigabit Ethernet interfaces) in static LAG mode, then there are issues in forwarding or routing protocols. For example, if you create two untagged logical interfaces—one each on the two 50-Gigabit Ethernet interfaces—on the PD-1CE-CFP-FPC4 and one untagged logical interface on the P1-PTX-2-100GE-CFP, then P1-PTX-2-100GE-CFP does not learn about one of the 50-Gigabit Ethernet interfaces on PD-1CE-CFP-FPC4.

See also

Configuring the Interoperability Between the 100-Gigabit Ethernet PICs P1-PTX-2-100GE-CFP and PD-1CE-CFP-FPC4

You can enable interoperability between the 100-Gigabit Ethernet PICs PD-1CE-CFP-FPC4 and P1-PTX-2-100GE-CFP by performing the following tasks:

Configuring SA Multicast Bit Steering Mode on 100-Gigabit Ethernet PIC P1-PTX-2-100GE-CFP

To enable the interoperability between the 100-Gigabit Ethernet PICs PD-1CE-CFP-FPC4 and P1-PTX-2-100GE-CFP, you must enable source address (SA) multicast bit steering mode on P1-PTX-2-100GE-CFP.

Note

When you configure the SA multicast bit steering mode on the PTX Series PIC P1-PTX-2-100GE-CFP, we recommend that you do not configure the PIC ports as member links of an aggregated Ethernet interface because this prevents load balancing on the peering T Series PIC PD-1CE-CFP-FPC4. This T Series PIC must be in aggregated Ethernet mode to share bandwidth between its two 50-Gigabit Ethernet interfaces.

To configure SA multicast bit steering mode on the 100-Gigabit Ethernet PIC P1-PTX-2-100GE-CFP:

  1. Specify the FPC, PIC, and port information on the chassis.

    For example:

  2. Configure the interoperation mode (SA multicast bit steering mode).
  3. Verify the configuration.
Note

As the default packet steering mode for the 100-Gigabit Ethernet PIC PD-1CE-CFP-FPC4 is SA multicast bit steering mode, no configuration is necessary to enable this mode.

Configuring Two 50-Gigabit Ethernet Physical Interfaces on the 100-Gigabit Ethernet PIC PD-1CE-CFP-FPC4 as One Aggregated Ethernet Interface

To enable the interoperability between the 100-Gigabit Ethernet PICs PD-1CE-CFP-FPC4 and PF-1CGE-CFP or P1-PTX-2-100GE-CFP, you need to configure the two 50-Gigabit Ethernet physical interfaces on PD-1CE-CFP-FPC4 as one aggregated Ethernet physical interface. This ensures that a single 100-Gigabit aggregated interface is visible on the link connecting to PF-1CGE-CFP or P1-PTX-2-100GE-CFP instead of two independent 50-Gigabit Ethernet interfaces.

When the PIC is in aggregated Ethernet mode, the two physical interfaces on the same PIC are aggregated into one aggregated Ethernet physical interface. When the PIC is configured with two physical interfaces, it creates the physical interfaces et-fpc/pic/0:0 and et-fpc/pic/0:1, where fpc is the FPC slot number and pic is the PIC slot number. For example, to configure two physical interfaces for PIC slot 0 in FPC slot 5:

  1. Specify the number of aggregated Ethernet interfaces to be created.

    For example:

  2. Specify the members to be included within the aggregated Ethernet bundle.

    The following example shows how to configure two physical interfaces for PIC 0 on a T1600 router.

  3. Verify the configuration at the chassis.
  4. Verify the configuration at the interface.

See also

Release History Table
Release
Description
Starting with Junos OS Release 13.2, aggregated Ethernet supports mixed rates and mixed modes on 100-Gigabit Ethernet PIC.