Configuring ATM QoS or Shaping
M7i, M10i, M40e, M120, and M320 routers with 4-port channelized OC3/STM1 Circuit Emulation PICs and 12-port T1/E1 Circuit Emulation PICs and MX Series routers with Channelized OC3/STM1 (Multi-Rate) Circuit Emulation MIC with SFP and 16-Port Channelized E1/T1 Circuit Emulation MIC support ATM pseudowire service with QoS features for ingress and egress direction traffic shaping. Policing is performed by monitoring the configured parameters on the incoming traffic and is also referred to as ingress shaping. Egress shaping uses queuing and scheduling to shape the outgoing traffic. Classification is provided per virtual circuit (VC).
To configure QoS shaping for Circuit Emulation PICs, use the shaping statement and its subordinate statements at the [edit interfaces at-fpc/pic/port unit n] hierarchy level. Most Circuit Emulation PIC QoS CLI commands are similar to those used for the ATM2 PIC QoS features. The interface configuration is sent to the PIC and the PIC driver configures the PIC appropriately.
Example: Shaping for Logical Interfaces in Port Promiscuous
Shaping for logical interfaces in port promiscuous mode is configured under the following hierarchy:
Example: Shaping for Logical Interfaces in VC Mode
Shaping for logical interfaces in VC mode is configured under the following hierarchy:
The Routing Engine and the Packet Forwarding Engine prefix the packet with information including a field that indicates the queue number associated with the VC.
Circuit Emulation PICs internally define queue 0 for CBR, queue 1 for RTVBR, queue 2 for VBR, and queue 3 for UBR.
Example: Shaping for Logical Interfaces in VC Mode with a Policer
You can similarly configure shaping for a policer configuration under the following similar configuration, but you must additionally use the policer required shaping specific parameters (cdvt) statement option: