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Synchronous Ethernet Overview
Synchronous Ethernet (ITU-T G.8261 and ITU-T G.8264) is a physical layer technology that functions regardless of the network load and supports hop-by-hop frequency transfer, where all interfaces on the trail must support Synchronous Ethernet. It enables you to deliver synchronization services that meet the requirements of the present-day mobile network, as well as future Long Term Evolution (LTE)–based infrastructures.
The following sections explain Synchronous Ethernet in detail:
Understanding Synchronous Ethernet
Synchronization is a key requirement for circuit (emulation) services and mobile radio access technologies. Traditionally, mobile networks used SONET/SDH technologies to backhaul voice and data traffic, and the native support for frequency of SONET/SDH to synchronize their radio network. With the need for greater-capacity backhaul networks, packet-based technologies such as Carrier Ethernet (which do not support the transfer of frequency) and wireless technologies such as frequency division duplex and time-division duplex require not only frequency synchronization but also proper time and phase alignment. This requirement is fulfilled by Synchronous Ethernet, which is used for physical layer frequency synchronization of connected access devices (such as base stations, access nodes, and so on). Synchronous Ethernet supports sourcing and transfer of frequency for synchronization purposes for both wireless and wireline services and is primarily used for mobile backhaul and converged transport.
Synchronous Ethernet is used to transfer clock signals over Ethernet interfaces. The Synchronous Ethernet operation is described in three ITU recommendations:
G.8261—Defines the architecture and wander performance of Synchronous Ethernet networks.
G.8262—Specifies timing characteristics of synchronous Ethernet equipment clock (EEC).
G.8264—Describes the Ethernet Synchronization Message Channel (ESMC).
Synchronous Ethernet is not supported in the following instances on an MX Series router:
Slot 10 on an MX Series router with Switch Control Board (SCB).
However, note that Synchronous Ethernet is supported on slot 10 on an MX Series router with SCBE and SCBE2.
Unified in-service software upgrade (unified ISSU) is currently not supported when clock synchronization is configured for Synchronous Ethernet on MX80 Universal Routing Platforms and on the MICs and MPCEs on MX240, MX480, MX960, MX2010, and MX2020 routers.
Table 1 summarizes the first Junos OS release that supports Synchronous Ethernet on the various Juniper Networks routers and their components:
Table 1: Synchronous Ethernet Support on Junos OS
Routers and Components
First Supported Junos OS Release
MX5, MX10, MX40, and MX80 Universal Routing Platforms with model numbers MX5-T, MX10-T, MX40-T, and MX80-T
10-Gigabit Ethernet MPC with SFP+ transceivers
10-Gigabit Ethernet MIC with XFP in WAN-PHY framing mode
On MX240, MX480, and MX960 routers, the following Enhanced MPCs (MPCEs) support Synchronous Ethernet:
10-Gigabit Ethernet MIC with XFP in LAN-PHY framing mode
Juniper Networks PTX Series Packet Transport Routers with 10-Gigabit Ethernet, 40-Gigabit Ethernet, and 100-Gigabit Ethernet interfaces
Juniper Networks ACX2000 Series Universal Metro Routers with Gigabit Ethernet and 10-Gigabit Ethernet SFP and SFP+ transceivers.
|On MX240, MX480,
and MX960 routers with SCBE, the following MPCs support Synchronous
On MX2010 and MX2020 routers, the following Enhanced MPCs (MPCEs) support Synchronous Ethernet:
|On MX240, MX480,
and MX960 routers with SCBE2, and MX2010, MX2020 routers, the following
MPCs support Synchronous Ethernet:|
On MX240, MX480, and MX960 routers with SCBE or SCBE2, on MX2010 and on MX2020 routers with RE-CB, the following MPCs support Synchronous Ethernet:
On PTX3000, the following third-generation FPCs support Synchronous Ethernet:
MPC10E-15C-MRATE on MX240, MX480, and MX960 routers.
MPC11E on MX2020, MX2010, and MX2008 routers.
Starting with Junos OS Release 12.1, Synchronous Ethernet is supported on Juniper Networks PTX Series Packet Transport Routers. On PTX Series routers, synchronous Ethernet is supported on 10-Gigabit Ethernet, 40-Gigabit Ethernet, and 100-Gigabit Ethernet interfaces and is compliant with ITU-T G.8261 and ITU-T G.8262 standards.
Starting with Junos OS Release 14.2, Synchronous Ethernet supported on Juniper Networks PTX Series Packet Transport Routers is compliant with ITU-T G.8264 (Ethernet Synchronization Messaging Channel) standards.
Starting with Junos OS Release 12.2, Synchronous Ethernet is supported on Juniper Networks ACX Series Universal Metro routers with Gigabit Ethernet and 10-Gigabit Ethernet SFP and SFP+ transceivers and is compliant with the ITU-T G.8261 and G.8264 standards.
The 10-Gigabit Ethernet MIC with XFP supports Synchronous Ethernet, which requires both the MIC and the interface to be configured in LAN framing mode. In LAN mode, the LAN frequency is directly supplied by the MIC's on-board clocking circuitry.
The 100-Gigabit Ethernet OTN MIC with CFP2 (MIC6-100G-CFP2) on MPC6E (MX2K-MPC6E) supports Synchronous Ethernet on 100-Gigabit Ethernet interfaces and is compliant with ITU-T G.872 standards. You can configure the primary and secondary clock sources on the 100-Gigabit Ethernet OTN MIC. Chassis line cards can be configured to recover network timing clocks at the physical layer via Synchronous Ethernet. The 100-Gigabit Ethernet OTN MIC supports recovery of clocks via the OTN overhead bytes and not from the configured clock sources.
Starting with Junos OS Release 17.3, Synchronous Ethernet supported on fixed port PIC ( 6xQSFPP) and modular MIC (JNP-MIC1) on MX10003 routers is compliant with ITU-T G.8264 (Ethernet Synchronization Messaging Channel) standards.
Starting with Junos OS Release 17.4, Synchronous Ethernet supported on the fixed port PICs (4xQSFP28 PIC and 8xSFPP PIC) on MX204 routers is compliant with ITU-T G.8264 (Ethernet Synchronization Messaging Channel) standards.
Understanding Synchronous Ethernet on the ACX Series Universal Metro Routers
Synchronous Ethernet is supported on the ACX Series routers with Gigabit Ethernet and 10-Gigabit Ethernet SFP and SFP+ transceivers and is compliant with ITU-T Recommendation G.8261: Timing and synchronization aspects in packet networks and ITU-T Recommendation G8264: Distribution of timing through packet networks.Synchronous Ethernet is a physical layer frequency transfer technology modeled after synchronization in SONET/SDH. Traditional Ethernet nodes, which do not support Synchronous Ethernet, do not carry synchronization from one node link to another. Synchronous Ethernet–capable nodes however can synchronize their chassis clock to a clock recovered from an interface connected to an upstream clock master. After this, the clock is used to time data sent to downstream clock slaves, forming a synchronization trail from a Primary Reference Clock (PRC) to Ethernet equipment clocks (EECs) and transferring frequency synchronization along the trail.
The ITU-T G.8264 specification defines the Synchronization Status Message (SSM) protocol and its format for Synchronous Ethernet to ensure interoperability between Synchronous Ethernet equipment used for frequency transfer—for example, SONET/SDH. Synchronous Ethernet provides stable frequency synchronization to a PRC and is not affected by load on the network. However, it requires that all the nodes from the PRC to the last downstream node are Synchronous Ethernet capable. Synchronous Ethernet is a recommended technology for mobile networks that require frequency-only synchronization—for example, 2G or 3G base stations.
Understanding Clock Synchronization
MX Series and PTX Series routers support external clock synchronization and automatic clock selection for Synchronous Ethernet and external inputs (T1 or E1 line timing sources).
Configuring external clock synchronization and automatic clock selection requires making clock selection, quality level, and priority considerations. The clock source selection algorithm is used to pick the two best upstream clock sources from among the various sources on the basis of system configuration and execution criteria such as quality level, priority, and hardware restrictions.
You can configure several options for external clock synchronization. For an overview about the configuration options, see Configuring Clock Synchronization Interface on MX Series Routers and for information about configuring these options for MX Series routers, see Understanding Clock Synchronization.
Currently, two types of clocking modes are supported on MX Series routers, the distributing clocking mode and the centralized clocking mode. For information about distributed clocking mode, see Understanding Distributed Clocking Mode on MX Series Routers and Ethernet Synchronization Message Channel Overview. For information about centralized clocking mode, see Centralized Clocking Mode Overview and Centralized Clocking Overview.
Understanding Ingress Monitoring on MX Series Routers
The ingress clock monitoring feature is supported on all MX Series routers including the 16-port 10-Gigabit Ethernet MPC. On these routers, the incoming Synchronous Ethernet signals cannot be monitored on the 16-port 10-Gigabit Ethernet MPC but are monitored by other Modular Port Concentrators (MPCs) in the chassis. Therefore, you can use the 16-port 10-Gigabit Ethernet MPC for incoming Synchronous Ethernet signals if at least one other MPC with an Ethernet Equipment Clock (EEC) is present in the chassis. This behavior is referred to as ingress clock monitoring. Note that the 16-port 10-Gigabit Ethernet MPC does not have a built-in EEC or internal clock; therefore, it can only input (accept) a clock signal but cannot act as a clock source.
When an MX Series router is configured for Synchronous Ethernet on the 16-port 10-Gigabit Ethernet MPC and no other MPC with an EEC is present in the chassis, the Synchronous Ethernet feature cannot be supported by the system. The system notifies the user through log messages and CLI output and justifies its inability to support Synchronous Ethernet.
For information about Synchronous Ethernet support on the 10-Gigabit Ethernet MIC, see Synchronous Ethernet on 10-Gigabit Ethernet MIC Overview.
Understanding Distributed Clocking Mode on MX Series Routers
In the distributing clocking mode, the Switch Control Board (SCB) supports synchronizing the MX Series router’s chassis to an internal Stratum 3 free-run oscillator. The Synchronous Ethernet timing messages are sent through the chassis to support the network timing trails that are traceable to a high-quality timing source. The timing messages are carried through the network by the Ethernet switches that were traditionally handled by time-division multiplexing (TDM) equipment over SONET/SDH interfaces. The distributing clocking mode is handled through ESMC messages. The ESMC support is based on the ITU-G.8264 specification. The ESMC messages transmit the clock quality of the line timing signal in the form of the (Synchronous Status Message) SSM TLV that is carried in the ESMC packet.For more information, see Ethernet Synchronization Message Channel Overview.
The distributed clocking mode has the following limitations:
There is no SCB centralized clock module to synchronize the entire chassis.
The recovered line timing is driven out only by the line interface of the 16-port 10-Gigabit Ethernet MPC.
The distributed mode does not support external clock interface timing.
Centralized clocking mode overcomes these limitations by distributing and driving timing out on all the chassis line interfaces.
Centralized Clocking Mode Overview
Starting with Junos OS Release 12.2, the Enhanced SCB SCBE on the MX240, MX480, and MX960 routers supports a Stratum 3 clock module. This clock module functions as a centralized point within the chassis for clock monitoring, filtering, holdover, and selection. It has only one external clock interface. For more information, see Centralized Clocking Overview.
Starting from Junos OS Release 13.3, the Enhanced SCB SCBE2 on the MX240, MX480, and MX960 routers supports two external clock interfaces external-0/0 and external-1/0. The external-0/0 interface refers to the external interface on the SCB in slot 0 and the external 1/0 interface refers to the external interface on the SCB in slot 1.
In SONET/SDH networks, the routers use the best-quality clock available in the network. The quality level of various clock sources in the network is determined by monitoring the Synchronization Status Messages (SSMs) from the clock sources. An SSM occupies a fixed location in the SONET frame. On Ethernet networks that use Synchronous Ethernet for clock synchronization, the SSM is not a part of the timing signal. The SSM is carried in the Ethernet packets that flow in the Ethernet Synchronization Message Channel (ESMC). By interpreting the SSM values, the router determines the clock quality associated with the clock source, and performs its clock selection accordingly. The ESMC messages transmit the clock quality of the line timing signal in the form of the SSM TLV that is part of the ESMC packet.
Note that the clock in the router goes into holdover mode in the absence of any clock sources with best quality level and in turn uses the timing information stored in its buffer to synchronize itself.
The following processes play a crucial role during external synchronization of the clock sources in the control board. Note that PTX Series routers need two best clock sources that act as primary and secondary clock sources, whereas MX Series routers need only one best clock source.
The clock sync process (clksyncd) performs the clock selection and participates in ESMC message exchange. For clock selection, in the absence of user-configured primary or secondary clock sources, the clksyncd runs a clock selection algorithm and selects the two best clocks available as the primary and secondary clock sources, respectively, for a PTX Series router or selects a best clock for an MX Series router. The clksyncd also sends out periodic ESMC packets to transmit its clock’s quality level to the other routers in the network—this is specified in the SSM TLV in the ESMC packet—and receives ESMC packets from other clock sources and tracks the received clock signal quality level. ESMC packets are received on all the interfaces that are configured as clock sources. ESMC packets are also transmitted to the clock-source interfaces on other routers, as well as to the interfaces that are configured to receive ESMC packets on other routers.
The chassis process (chassisd) is responsible for interfacing with the Enhanced Switch Control Board (SCBE) on MX Series routers and Centralized Clock Generator (CCG) on PTX Series routers. It monitors the clock quality and assists SCBE or the CCG to determine the clock source with the best quality level. When it detects clock quality deterioration, it informs clksyncd to select another primary clock source. After clock selection chassisd is updated with the latest clock source information. Note that in the absence of user-configured primary and secondary clock sources on PTX Series routers, the clock sources are selected through the clock algorithm and chassisd is updated with the latest clock information. Consequently, a new interprocess connection is established between chassisd and clksyncd.
The periodic packet management process (ppmd) performs periodic transmission of ESMC packets to others routers in the network. It also receives incoming ESMC packets from other routers. The ppmd filters out repetitive ESMC packets to reduce packet flows between ppmd and clksyncd.
The following explains a simple clock selection process using ESMC packets:
The Synchronous Ethernet (line timing) signal is an Ethernet physical layer signal that is received on the Ethernet interface. ESMC is a Layer 2 Ethernet packet. The Synchronous Ethernet signal and the ESMC packets are received on the Ethernet interface of the router.
The received Synchronous Ethernet signal is sent to the clock hardware in the SCBE or in the CCG, whereas the ESMC packets—with the quality level—is directed to the clksyncd.
The clock selection algorithm in clksyncd selects the best clock signal based on the quality level in the ESMC packet from one of the interfaces that is configured as a clock source. On PTX Series routers, the algorithm also selects the next best—when available—clock as the secondary clock.
The best clock information is transmitted to the chassisd, which in turn generates a command to the clock hardware to use the best clock as the reference clock. On PTX Series routers, both primary and secondary clocks are used..
The reference clock uses the best—primary in PTX Series routers—clock signal as the system clock that is used to generate Synchronous Ethernet signal to transmit on all its interfaces.
The ESMC transmit module in clksyncd is notified of the quality level corresponding to the best—primary—clock. This quality level is used for ESMC packets that are transmitted out of the router.
ESMC packets are transmitted on all the source interfaces and on those interfaces that are configured as esmc-transmit interfaces.
On SCBE2, you can configure the external synchronization options only on the external interface on the active SCB. Therefore, if the active SCB is in slot 0, then you can configure the external-0/0 interface only. If the active SCB is in slot 1, then you can configure the external-1/0 interface only.
The centralized mode is applicable to mobile backhaul infrastructures and for network transition from traditional TDM to Ethernet network elements with the support of Synchronous Ethernet.