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Known Issues

 

This section lists the known issues in hardware and software in Junos OS Release 17.1R2 for the PTX Series.

For the most complete and latest information about known Junos OS defects, use the Juniper Networks online Junos Problem Report Search application.

General Routing

  • PTX 100GbE-LR4 interfaces may flap when the reference clock switches over from "line clock" to "holdover" initiated by offlining the PIC, on which the "line clock" sources reside. When PTX uses "line clock" sources and when it does not have any external clocks from BITS-a or BITS-b, offlining the PIC, which is recovering clock from line, brings "line clock" down and the reference clock is switched from "line clock" to "holdover". This reference clock transition may cause a large clock phase-shift in the 100GbE-LR4 CFP modules, and this phase-shift may cause the output optical pulse waveform distortion on the 100GbE-LR4 interfaces. Hence, it results in interface flap. This issue cannot be fixed by software due to hardware limitation. PR1130403

  • While upgrading from 15.1F based images to 16.x+ images or downgrading from 16.x+ images to 15.1F based images, if validate option is enabled, there may be a chassisd crash and upgrade/downgrade will fail. This issue should not be seen if both base and target images are from 15.1F train or 16.x+ train. PR1171652

  • For FPC3 on PTX Series platform, in rare scenarios, while restarting FPC, a PIC index mismatch issue might result in FPC crash if it is configured with inline-JFlow. PR1183215

  • This is a resiliency feature. If more than 10 FO CRC errors are seen in an interval of 30 seconds, then CMERROR infra raises an alarm and appropriate action is taken. PR1197865

  • Power budget values for a PTX5000 chassis, FPC, and PICs have been revised. For routers operating on limited power, this can change the point where alarms for power-over-budget or insufficient power are raised or cleared. PR1216404

  • PTX Series FPC3 might receive noise on the FPC console port and interpret it as valid signals. This might cause login fails on the console port, core files to be generated, or even reloads. PR1224820

  • On PTX1000/QFX10002 platform, some random ports, using 100G Lumentum optics, might not come up after a reboot. This is a timing issue because of failures during optics read on some ports. When hitting this issue, remove and insert the optics, which might bring up the ports. PR1227029

  • When pulling a SIB out without offline on PTX platform with FPC3, it is possible that traffic may be dropped resulting in an overall reduction in traffic throughput.PR1162977

Interfaces and Chassis

  • 1. Delay Measurement support for 5-port 100G DWDM PIC and 5-port 100G DWDM MIC is one-time delay measurement. This means that a customer intending to measure Delay 2 points should ensure that the link is up on both sides and then conduct this one-time test. The result value is valid one time once the test is finished. The test result on CLI is not valid after one-time measurement as the old result might show up on Routing Engine CLI. 2. Remote-loop-enable should be configured first on remote end. Only after this start-measurement should be configured. 3. Each time the customer wants to verify this, the test has to be repeated. 4. Processing delays in each mode is different HGFEC [For 5-port 100G DWDM MIC] being highest, SDFEC in the interim and GFEC being least for the same cable length. 5. In summary, any breakage in the transmit/receive path during the Delay Measurement test will hinder the delay measurement. This is true for all FEC modes - GFEC, SDFEC, HGFEC. 6. Currently SNMP walk is not available for Delay Measurement. PR1233917

Platform and Infrastructure

  • On a PTX Series platform, parity memory errors might happen in pre classifier engines within an MPC. Packets will be silently discarded as such errors are not reported and make it harder to diagnose. After the change in this PR, CM-ERRORs, such as syslogs and alarms, will be raised when parity memory errors occur. PR1059137

  • In a very rare scenario, during TAC accounting configuration change, auditd daemon crashes due to a race condition between auditd and its sigalarm handler. PR1191527

  • On PTX Series platform with [chassis network-services enhanced-mode] configured, the default policy junos-ptx-series-default is not loaded correctly during some configuration operations, which causes BGP routes not to be installed in the forwarding table as expected. To avoid this issue, reboot the router after any configuration operations on network services. PR1204827

User Interface and Configuration

  • When persist-groups-inheritance is configured and you issue a rollback, the configuration is not propagated properly after a commit. PR1214743