Configuring T1 and E1 Port Parameters for CTP Bundles (CTP Menu)
This topic describes how to configure port parameters for T1/E1 interfaces.
Before you begin:
Disable the bundle before you modify the bundle options.
To configure port parameters for T1/E1 daughter cards for CTP bundles using the CTP Menu:
- From the CTP Main Menu, select 1) Bundle Operations.
- Select 1) CTP.
- Select a bundle from the list. The bundle port must have
a T1/E1 daughter card installed.
If you select an active bundle, you are prompted to disable the bundle before configuring it.
- Select 3) Port Config.
- Select 2) Interface.
- Select 1) Type and set the type to Optional Interface: T1/E1.
- Follow the onscreen instructions and configure the options
as described in Table 26.
The options vary depending on whether the bundle is T1 or E1 and whether fractional T1 or E1 is configured.
- To configure clocking for the port, select 3) Clock Config and configure the Clock Config option as described in Table 26.
BITS input is a T1/E1 line interface unit (LIU), with AMI (alternate mark inversion) encoding enabled and B8ZS/HDB3 (Zero Suppression) disabled. The equalization is set for a 0-133 feet cable. An internal 100 ohm termination is present, although it might need to be externally augmented based on the type of cabling used. Any valid AMI signal works properly and it is not restricted to only the "all 1" BITS signal but the ones density must be sufficient to prevent LOS (according to the ITU G.775 recommendation). The TTL input has a slice point of 3.3V/2 = 1.65V relative to chassis ground (GND). Therefore, any signal on the coaxial center conductor that transitions through that voltage registers a transition. There are many signals, besides TTL, that satisfy this criteria. An external termination must be provided that matches the impedance of the cable that goes to the BNC connector.
If you can configure the rate in CTP menu, then the TTL supports a frequency of 2048 KHz for the TTL clock input, provided the signal is good and noise-free (terminated properly). TTL is rate-agile, while BITS is restricted to T1/E1 frequencies.
The TTL input is high-impedance (no on-board termination provided) because a variety of cable types might exist that you can use to drive signal to this connector, such as RG-58 coax (50 ohm), RG-59 coax (75 ohm), or twisted pair (100-120 ohm). Instead of applying a particular impedance termination on the board and have it incorrectly done, we recommend that you configure the impedance termination based on your network environment. For example, a 50 ohm termination is needed if you are using RG-58/U coax cable, which has 50 ohm impedance.
Specifies a description for the port.
Enter a description of up to 64 alphanumeric characters. Do not use the following characters:
( ; ' " ) ]
Specifies the type of interface.
Option (for T1)
Specifies the T1 encoding method used on this bundle.
Option (for E1)
For E1 interfaces, configure the termination to work with either coaxial or RJ-48.
The following clock synthesizer settings are set by the software, and you cannot change them:
Specifies the number of fractional T1 or E1 channels to transport.
For T1, select a number from 1 through 24.
For E1, select a number from 1 through 31.
Fractional Frame Transport
For fractional T1, enables or disables fractional frame transport.
Specifies the signaling method used for fractional E1.
Specifies the type of clocking for the port. The default value for Clock Config is CTP is Loop Timed.