List of Tables

Table 1: Notice Icons

Table 2: Text and Syntax Conventions

Table 3: Technical Documentation for Supported Routing Platforms

Table 4: JUNOS Software Network Operations Guides

Table 5: JUNOS Software with Enhanced Services Documentation

Table 6: Additional Books Available Through http://www.juniper.net/books

Table 7: CoS Mappings—Inputs and Outputs

Table 8: Default VPLS Classifiers

Table 9: CoS Hardware Capabilities and Limitations

Table 10: Drop Priority Classification for Packet Sent from Enhanced III to Enhanced II FPC on M320

Table 11: Drop Priority Classification for Packet Sent from Enhanced II FPC Without Tricolor Marking to Enhanced III FPC on M320

Table 12: Drop Priority Classification for Packet Sent from Enhanced II FPC With Tricolor Marking to Enhanced III FPC on M320

Table 13: Routing Engine Protocol Queue Assignments

Table 14: Default CoS Values

Table 15: Default IP Precedence Classifier

Table 16: Default MPLS Classifier

Table 17: Default DSCP Classifier

Table 18: Default IEEE 802.1p Classifier

Table 19: Default IEEE 802.1ad Classifier

Table 20: Default IP Precedence (ipprec-default) Classifier

Table 21: Logical Interface Classifier Combinations by Platform

Table 22: Default MPLS EXP Classification Table

Table 23: Default Forwarding Classes

Table 24: Sample Forwarding Class-to-Queue Mapping

Table 25: Buffer Size Temporal Value Ranges by Platform Type

Table 26: Recommended Delay Buffer Sizes

Table 27: Maximum Delay Buffer with q-pic-large-buffer Enabled by Interface

Table 28: Delay-Buffer Calculations

Table 29: NxDSO Transmission Rates and Delay Buffers

Table 30: Scheduling Priority Mappings by FPC Type

Table 31: Shaping Rate and WRR Calculations by PIC Type

Table 32: Transmission Scheduling Support by Interfaces Type

Table 33: Bandwidth and Delay Buffer Allocations by Configuration Scenario

Table 34: Bandwidth and Delay Buffer Allocations by Configuration Scenario

Table 35: Scheduler Allocation for an Ethernet IQ2 PIC

Table 36: RTT Delay Buffers for IQ2 PICs

Table 37: TCM Platform Interoperation

Table 38: Color-Blind Mode TCM Color-to-PLP Mapping

Table 39: Color-Aware Mode TCM PLP Mapping

Table 40: Color-Blind Mode TCM Color-to-PLP Mapping

Table 41: Color-Aware Mode TCM Mapping

Table 42: Tricolor Marking Policer Statements

Table 43: Default Packet Header Rewrite Mappings

Table 44: Default MPLS EXP Rewrite Table

Table 45: Hierarchical Scheduler Nodes

Table 46: Queue Priority

Table 47: Internal Node Queue Priority for CIR Mode

Table 48: Internal Node Queue Priority for PIR-Only Mode

Table 49: IQ2 PIC and EQ DPC Compared

Table 50: Shaper Accuracy of 1-Gbps Ethernet at the Logical Interface Level

Table 51: Shaper Accuracy of 10-Gbps Ethernet at the Logical Interface Level

Table 52: Shaper Accuracy of 1-Gbps Ethernet at the Interface Set Level.

Table 53: Shaper Accuracy of 10-Gbps Ethernet at the Interface Set Level.

Table 54: Shaper Accuracy of 1-Gbps Ethernet at the Physical Port Level.

Table 55: Shaper Accuracy of 10-Gbps Ethernet at the Physical Port Level.

Table 56: JUNOS Priorities Mapped to EQ DPC Hardware Priorities

Table 57: Shaping Rates and WFQ Weights

Table 58: Example Shaping Rates and WFQ Weights

Table 59: Rounding Configured Weights to Hardware Weights

Table 60: Allocating Weights with PIR and CIR on Logical Interfaces

Table 61: Sharing Bandwidth Among Logical Interfaces

Table 62: First Example of Bandwidth Sharing

Table 63: Second Example of Bandwidth Sharing

Table 64: Final Example of Bandwidth Sharing

Table 65: LSR Default Classification