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List of Figures

Figure 1: Routing Matrix
Figure 2: Interface Slot, PIC, and Port Locations
Figure 3: Clock Sources
Figure 4: DLSw Ethernet Redundancy Topology
Figure 5: Unicast RPF with Routing Asymmetry
Figure 6: Prefix Accounting with Source and Destination Classes
Figure 7: Layer 2 Switching Circuit Cross-Connect
Figure 8: Example Topology of a Switching Circuit Cross-Connect with Frame Relay CCC Encapsulation
Figure 9: Layer 2.5 Switching Translational Cross-Connect
Figure 10: Interface-to-Interface Circuit Cross-Connect over Aggregated Ethernet Interfaces
Figure 11: Remote Interface-LSP-Interface Circuit Cross-Connect over Aggregated Ethernet Interfaces
Figure 12: Layer 2 Circuit Trunk Topology
Figure 13: Example Topology for Router with Eight Queues
Figure 14: Structure of the Channelized OC3 IQ PIC
Figure 15: Structure of the Channelized OC12 IQ PIC
Figure 16: Structure of the Channelized STM1 IQ PIC
Figure 17: Structure of the Channelized DS3 IQ PIC
Figure 18: Structure of the Channelized E1 IQ PIC
Figure 19: Channelized OC3 IQ Interface Example for Show Interfaces Controller
Figure 20: T1 Interfaces on a Channelized OC3 PIC
Figure 21: Sample Channelization of OC3 IQ PIC
Figure 22: Sample Channelization of OC12 IQ PIC (SONET mode)
Figure 23: Sample Channelization of OC12 IQ PIC (SDH mode)
Figure 24: Sample Channelization of OC12 PIC
Figure 25: T1 Interfaces on a Channelized OC12 PIC
Figure 26: Sample Channelization of OC12 IQ PIC
Figure 27: Sample Channelization of DS3 IQ PIC
Figure 28: Remote and Local E1 Loopback
Figure 29: Remote and Local E3 Loopback
Figure 30: Topology of Layer 2.5 Translational Cross-Connect
Figure 31: Edge Device Case for Unrestricted Proxy ARP
Figure 32: Core Device Case for Unrestricted Proxy ARP
Figure 33: Relationship of MEPs, MIPs, and MD Levels.
Figure 34: Relationship of Bridges, MDs, MAs, and MEPs.
Figure 35: ISDN Backup Topology
Figure 36: Dialer Filter Topology
Figure 37: Bandwidth-on-Demand Topology
Figure 38: Dialer Watch Topology
Figure 39: PPPoE Session on an Ethernet Loop
Figure 40: Serial Interface Clocking Mode
Figure 41: Serial Interface LIU Loopback
Figure 42: Serial Interface Local Loopback
Figure 43: APS/MSP Configuration Topologies
Figure 44: APS Load Sharing Between Circuit Pairs
Figure 45: Remote and Local T1 Loopback
Figure 46: Remote and Local T3 Loopback

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