Configuring Channelized STM1 Interfaces

Each Channelized STM1 PIC and Channelized STM1 Intelligent Queuing (IQ) PIC has one STM1 port.

For the Channelized STM1 IQ PIC, you can channelize the single port to the NxDS0 level. Each E1 interface has 32 time slots (DS0), in which time slot 0 is reserved.

You can combine one or more of these DS0 time slots (channels) to create a channel group (NxDS0).

This chapter is organized as follows:

• Configuring Channelized STM1 IQ Interfaces
• Configuring Channelized STM1 Interfaces

For examples of channelized STM1 interface configuration, see the following:

• Example: Configuring Channelized STM1 IQ Interfaces
• Example: Configuring Channelized STM1 Interfaces

For a full configuration example, see the JUNOS Feature Guide.