Physical Part of an Interface Name

The physical part of an interface name identifies the physical device, which corresponds to a single physical network connector. This part of the interface name has the following format:

type-fpc/pic/port 

type is the media type, which identifies the network device. It can be one of the following:

• ae—Aggregated Ethernet interface. This is a virtual aggregated link and has a different naming format from most PICs; for more information, see Configuring Aggregated Ethernet Interfaces.
• as—Aggregated SONET/SDH interface. This is a virtual aggregated link and has a different naming format from most PICs; for more information, see Configuring Aggregated SONET/SDH Interfaces.
• at—ATM1 or ATM2 intelligent queuing (IQ) interface.
• br—Integrated Services Digital Network (ISDN) interface (configured on a 1-port or 4-port Basic Rate Interface [BRI] card. This interface has a different naming format from most PICs: br-pim/0/port. The second number is always 0. For more information, see Configuring ISDN Physical Interface Properties.
• cau4—Channelized AU-4 IQ interface (configured on the Channelized STM1 IQ PIC or Channelized OC12 IQ PIC).
• coc1—Channelized OC1 IQ interface (configured on the Channelized OC12 IQ or Channelized OC3 IQ PIC).
• coc3—Channelized OC3 IQ interface (configured on the Channelized OC3 IQ PIC).
• coc12—Channelized OC12 IQ interface (configured on the Channelized OC12 IQ PIC).
• cstm-1—Channelized STM1 IQ interface (configured on the Channelized STM1 IQ PIC).
• cstm-4—Channelized STM4 IQ interface (configured on the Channelized OC12 IQ PIC).
• ct1—Channelized T1 IQ interface (configured on the Channelized DS3 IQ PIC, Channelized OC3 IQ PIC, Channelized OC12 IQ PIC, or Channelized T1 IQ PIC).
• ct3—Channelized T3 IQ interface (configured on the Channelized DS3 IQ PIC, Channelized OC3 IQ PIC, or Channelized OC12 IQ PIC).
• ce1—Channelized E1 IQ interface (configured on the Channelized E1 IQ PIC or Channelized STM1 IQ PIC).
• cp—Collector interface (configured on the Monitoring Services II PIC).
• ds—DS0 interface (configured on the Multichannel DS3 PIC, Channelized E1 PIC, Channelized OC3 IQ PIC, Channelized OC12 IQ PIC, Channelized DS3 IQ PIC, Channelized E1 IQ PIC, Channelized STM1 IQ PIC, or Channelized T1 IQ).
• dsc—Discard interface.
• e1—E1 interface (including channelized STM1-to-E1 interfaces).
• e3—E3 interface (including E3 IQ interfaces).
• es—Encryption interface.
• fe—Fast Ethernet interface.
• fxp—Management and internal Ethernet interfaces. The JUNOS software automatically configures the routing platform's management Ethernet interface, fxp0, which is an out-of-band management interface, and the internal Ethernet interface, fxp1, which connects the Routing Engine with the routing platform's packet forwarding components.
• ge—Gigabit Ethernet interface (including Gigabit Ethernet IQ interfaces and 10-Gigabit Ethernet interfaces).
• gr—Generic routing encapsulation (GRE) tunnel interface.
• gre—Internally generated interface that is configurable only as the control channel for Generalized MPLS (GMPLS). For more information about GMPLS, see the JUNOS MPLS Applications Configuration Guide and the JUNOS Feature Guide.
• ip—IP-over-IP encapsulation tunnel interface.
• ipip—Internally generated interface that is not configurable.
• lo—Loopback interface. The JUNOS software automatically configures one loopback interface (lo0). The logical interface lo0.16383 is a nonconfigurable interface for routing platform control traffic.
• ls—Link services interface.
• lsi—Internally generated interface that is not configurable.
• ml—Multilink interface (including Multilink Frame Relay and MLPPP).
• mo—Monitoring services interface (including monitoring services and monitoring services II). The logical interface mo-fpc/pic/port.16383 is an internally generated, nonconfigurable interface for routing platform control traffic.
• mt—Multicast tunnel interface (internal routing platform interface for VPNs). If your routing platform has a Tunnel PIC, the JUNOS software automatically configures one multicast tunnel interface (mt) for each virtual private network (VPN) you configure. You do not need to configure multicast tunnel interfaces.
• mtun—Internally generated interface that is not configurable.
• oc3—OC3 IQ interface (configured on the Channelized OC12 IQ PIC or Channelized OC3 IQ PIC).
• pd—Interface on the rendezvous point (RP) that de-encapsulates packets.
• pe—Interface on the first-hop RP that encapsulates packets destined for the RP routing platform.
• pimd—Internally generated interface that is not configurable.
• pime—Internally generated interface that is not configurable.
• rsp—Redundant interface for the adaptive services interface.
• se—Serial interface (including EIA-530, V.35, and X.21 interfaces).
• so—SONET/SDH interface.
• sp—Adaptive services interface. The logical interface sp-fpc/pic/port.16383 is an internally generated, nonconfigurable interface for routing platform control traffic.
• t1—T1 interface (including channelized DS3-to-DS1 interfaces).
• t3—T3 interface (including channelized OC12-to-DS3 interfaces).
• tap—Internally generated interface that is not configurable.
• vsp—Voice services interface.
• vc4—<Reviewer>
• vt—Virtual loopback tunnel interface.

fpc identifies the number of the FPC card on which the physical interface is located. Specifically, it is the number of the slot in which the FPC card is installed. M40, M40e, M160, M320, T320, and T640 platforms each have eight FPC slots that are numbered 0 through 7, from left to right as you are facing the front of the chassis. The M20 routing platform has four FPC slots that are numbered 0 through 3, from top to bottom as you are facing the front of the chassis. The slot number is printed adjacent to each slot. M5, M7i, M10, and M10i routing platforms do not use FPCs; you install the PICs individually. The M5 and M7i routing platforms have space for up to four PICs. The M7i routing platform also comes with an integrated Tunnel PIC or an optional integrated AS PIC. The M10 and M10i routing platforms have space for up to eight PICs. A routing matrix can have up to 32 FPCs (numbered 0 through 31). For more information about interface naming for a routing matrix, see Interface Naming for a Routing Matrix.

pic identifies the number of the PIC on which the physical interface is located. Specifically, it is the number of the PIC location on the FPC. The four PIC slots are numbered 0 through 3. The PIC location is printed on the FPC carrier board. For PICs that occupy more than one PIC location, use the lower location number.

port identifies a specific port on a PIC. The number of ports varies depending on the PIC. The port slot numbers are printed on the PIC.