Clock Sources on Channelized Interfaces

Original channelized interfaces and channelized QPP interfaces have different clocking capabilities. For channelized QPP interfaces, you can configure clocking on each port independently by including the clocking (internal | external) statement at the [edit interfaces interface-name] hierarchy level.

For channelized QPP interfaces, clocking is provided as follows:

• SONET-level clocking is provided at the [edit interfaces coc12-fpc/pic/port] hierarchy level.
• T3-level clocking is provided at the [edit interfaces ct3-fpc/pic/port] hierarchy level.
• T1-level clocking is provided at the [edit interfaces t1-fpc/pic/port<:channel>] hierarchy level.
• E1-level clocking is provided at the [edit interfaces ce1-fpc/pic/port] hierarchy level.
• Clocking for all NxDS-0 channels is provided at the [edit interfaces ct1-fpc/pic/port<:channel>] or [edit interfaces ce1-fpc/pic/port] hierarchy level.
• The clocking statement is ignored if you include it at the [edit interfaces coc1-fpc/pic/port:channel] hierarchy level.
• If you include the clocking statement at the channelized and interface levels—coc12-fpc/pic/port and so-fpc/pic/port, for example—the clocking configuration at the channelized level, coc12-fpc/pic/port in this example, takes precedence.

For original channelized interfaces, clocking at each channel level is provided as follows:

• The clocking statement is supported only for channel 0; it is ignored if included in the configuration of other channels.
• The clock source configured for channel 0 applies to all channels on the original channelized interfaces.
• When you configure the clock source for a channelized interface—t3-pc/pic/port:0, for example—you must also include the channel-group statement at the [edit chassis] hierarchy level, with channel group 0 specified.
• For original Channelized T3 interfaces, you can configure external clocking (loop timing) on all T1 channels under the Channelized T3 interface. The loop-timing and no-loop-timing statements apply only to Channelized T3 interfaces. If you attempt to configure these statements on any other interface type, they are ignored. To configure loop timing for all T1 channels under the Channelized T3 interface, include the loop-timing statement at the [edit interfaces ct3-fpc/pic/port t3-options] hierarchy level.
• For original Channelized STM-1 interfaces, you should configure the clock source at one side of the connection to be internal and configure the other side of the connection to be external.

Table 15 lists the clocking capabilities for each channelized PIC.

Table 15: Clocking Capabilities by Channelized PIC Type

PIC Type	SONET Level	DS-3 Level	DS-1/E1 Level
Original Channelized PICs
Channelized OC-12	Not configurable.	The clocking statement is supported at the [edit interfaces t3-fpc/pic/port:0] hierarchy level.	Not applicable.
Channelized DS-3 and Multichannel DS-3	Not applicable.	The loop-timing statement is supported at the [edit interfaces t1-fpc/pic/port:0 t3-options] or [edit interfaces ds-fpc/pic/port:0:0 t3-options] hierarchy level.	The clocking statement is supported at the [edit interfaces t1-fpc/pic/port:0] or [edit interfaces ds-fpc/pic/port:0:0] hierarchy level.
Channelized STM-1	Not configurable.	Not applicable.	The clocking statement is supported at the [edit interfaces e1-fpc/pic/port:[0-62] hierarchy level.
Channelized E1	Not applicable.	Not applicable.	The clocking statement is supported at the [edit interfaces e1-fpc/pic/port:[0-9]] or [edit interfaces ds-fpc/pic/port:0] hierarchy level.
Channelized PICs with QPP
Channelized OC-12 with QPP	The clocking statement is supported at the [edit interfaces coc12-fpc/pic/port]. The clocking statement is ignored if you include it at the [edit interfaces so-fpc/pic/port] hierarchy level.	The clocking statement is supported at the [edit interfaces t3-fpc/pic/port:[1-12]] hierarchy level.	The clocking statement is supported at the [edit interfaces ct1-fpc/pic/port:[1-12]:[1-28]] and [edit interfaces t1-fpc/pic/port:[1-12]:[1-28]] hierarchy levels.
Channelized DS-3 with QPP	Not applicable.	The clocking statement is supported at the [edit interfaces ct3-fpc/pic/port]. The clocking statement is ignored if you include it at the [edit interfaces t3-fpc/pic/port] hierarchy level.	The clocking statement is supported at the [edit interfaces ct1-fpc/pic/port:[1-28]] and [edit interfaces t1-fpc/pic/port:[1-28]] hierarchy levels.
Channelized E1 with QPP	Not applicable.	Not applicable.	The clocking statement is supported at the [edit interfaces ce1-fpc/pic/port]. The clocking statement is ignored if you include it at the [edit interfaces e1-fpc/pic/port] hierarchy level.