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Product Architecture

The router is composed of two components (see Figure 1):

Because this architecture separates control operations such as routing updates and system management from packet forwarding, the router can deliver superior performance and highly reliable Internet operation.

Figure 1: Product Architecture

 

Packet Forwarding Engine

The Packet Forwarding Engine forwards packets between input and output interfaces.

Packet Flow through the Router

The function of the Packet Forwarding Engine can be understood by following the flow of a packet through the router—first into a PIC, then through the switching fabric, and finally out another PIC for transmission on a network link.

When a packet arrives on an input interface, a media-specific PIC performs all the media-specific details such as framing and checksum verification.

The PIC then passes a serial stream of bits into the FPC, which parses and appropriately decapsulates the packet. The FPC also breaks the packet into 64-byte memory blocks and passes each memory block to the Distributed Buffer Manager ASIC. The Distributed Buffer Manager ASIC then writes them into packet buffer memory, which is distributed evenly across all the FPCs installed in the router.

In parallel with the buffering, the Distributed Buffer Manager ASIC extracts the information from the packet needed for route lookup and passes that information to the Internet Processor ASIC, which performs a lookup in its full forwarding table and finds the outgoing interface and the specific next hop. The forwarding table can forward all unicast packets that do not have options and multicast packets that have been previously cached. Unicast packets with options and noncached multicast packets are sent to the Routing Engine for resolution.

After the Internet Processor ASIC has determined the next hop, it passes the results of the lookup to a second Distributed Buffer Manager ASIC, which in turn passes it to the outgoing interface. (Note that there could be multiple outgoing interfaces in the case of multicast.)

It is at this point that a pointer to the packet is queued, not the packet itself. Each output port has four queues, each of which has some configured share of the link bandwidth. Several factors can account for queuing order, including the value of the precedence bits, utilization of the input interface, destination address, and RED and WRED algorithms. If the outgoing interface decides to queue the packet for transmission, when the packet reaches the front of the queue and is ready for transmission, the memory blocks are read from packet buffer memory. Then the packet is reassembled and passed to the media-specific PIC for transmission on the line.

Routing Engine

The Routing Engine handles all the routing protocol processes and other software processes that control the router's interfaces, a few of the chassis components, system management, and user access to the router. These routing and software processes run on top of a kernel that interacts with the Packet Forwarding Engine.

The Routing Engine has these features:

The Routing Engine constructs and maintains one or more routing tables. From the routing tables, the Routing Engine derives a table of active routes, called the forwarding table, which is then copied into the Packet Forwarding Engine. The forwarding table in the Packet Forwarding Engine can be updated without interrupting the router's forwarding.



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