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Home > Support > Technical Documentation > M Series Routers > M10i Router Hardware > Channelized E1 IQ EOL PIC (M10i Router)
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Related Documentation

  • M Series
  • M10i PICs Description
  • M10i End-of-Life PICs Supported
 

Channelized E1 IQ EOL PIC (M10i Router)

Software release

  • Junos OS Release 6.0 and later

Description

  • Ten E1 ports
  • Power requirement: 0.15 A @ 48 V (7.2 W)
  • Intelligent queuing (IQ) PICs support fine-grained queuing per logical interface.
  • Channelization: E1, DS0

Hardware features

  • Data service unit (DSU) functionality
  • Ports configurable as clear channel E1 interfaces with 2.048-Mbps connectivity
  • Supports unframed E1 G.703 and G.704 framing modes
  • Supports HDB3 line coding
  • CRC4 configurable
  • Local and remote loopback testing

Software features

  • Quality of service (QoS) per channel: weighted round-robin (WRR), random early detection (RED), weighted random early detection (WRED)
  • Simple Network Management Protocol (SNMP): E1 MIB, DS0 MIB
  • Dynamic, arbitrary channel configuration
  • Full bit error rate test (BERT)
  • Encapsulations:
    • High-Level Data Link Control (HDLC)
    • Frame Relay
    • Circuit cross-connect (CCC)
    • Translational cross-connect (TCC)
    • Point-to-Point Protocol (PPP)

Cables and connectors

  • 120-ohm RJ-48C

LEDs

One bicolor per E1 port:

  • Off—Port not enabled
  • Green—Physical E1 link is up; individual subchannels can be down
  • Red—Physical E1 link is down

Alarms, errors, and events

  • Alarm indication signal (AIS)
  • Loss of frame (LOF)
  • Out of frame (OOF)
  • Failed signal rate (FSR)

Instrumentation (counters)

  • Layer 2 per-queue and per-channel packet and byte counters
 

Related Documentation

  • M Series
  • M10i PICs Description
  • M10i End-of-Life PICs Supported
 

Published: 2012-03-21

 
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