M40e Flexible PIC Concentrators (FPCs) Description

M40e FPC Function

Flexible PIC Concentrators (FPCs) house the PICs that connect the router to network media (for information about PICs, see M40e PICs Description). The main function of an FPC is to connect the PICs installed in it to the other router components. An I/O Manager ASIC on the FPC divides each incoming data packet into 64-byte cells and passes the cells through the midplane to the SFM, where another ASIC decides how to distribute them among the memory buffers located on and shared by all installed FPCs. After the SFM decides how to forward a packet, an I/O Manager ASIC on the FPC reassembles the corresponding data cells back into network-packet form and passes the packet to the appropriate PIC for transmission to the network. For more information, see M40e Packet Forwarding Engine Architecture.

M40e FPC Slots

Up to eight FPCs install vertically into the midplane from the front of the chassis. The FPC slots are numbered from FPC0 to FPC7, left to right. Each FPC accommodates either one or up to four PICs, depending on the type of FPC and PIC. The PIC slots in each FPC are numbered from 0 (zero) through 3, top to bottom. An FPC can be installed into any FPC slot, regardless of the PICs it contains, and any combination of slots can be used. If a slot is empty, you must install a blank FPC panel to shield it, so that cooling air can circulate properly throughout the card cage.

Figure 1, which shows a chassis with an FPC in slot FPC0, omits the blank FPC panels to show the position of the FPC in the card cage.

Figure 1: Front of M40e Chassis with Four-PIC FPC Installed in Slot FPC0

M40e FPC Components

An FPC has the components:

• FPC card carrier—Houses the ASICs, connectors, and processor subsystem.
• Two I/O Manager ASICs—Parse Layer 2 and Layer 3 data and perform encapsulation and segmentation. One I/O Manager ASIC is active, interacting with the active SFM, while the other is in standby mode, prepared to interact with the standby SFM if it is installed and becomes active. The active I/O Manager ASIC divides incoming packets into 64-byte data cells for easier processing, and reassembles the cells for each packet after the forwarding decision is made for it.
• Two Packet Director ASICs—Transfer packets between the PICs and the active I/O Manager ASIC: one directs incoming packets from the PICs to the active I/O Manager ASIC, while the second directs outgoing packets from the I/O Manager ASIC to the PICs.
• Four identical synchronous DRAM (SDRAM) dual inline memory modules (DIMMs)—Form the memory pool shared with the other FPCs installed in the router.
• Parity-protected synchronous SRAM (SSRAM)—Stores data structures used by the I/O Manager ASICs.
• Processor subsystem—Manages packet handling in the FPC and communication with the SFM. It is a PowerPC 603e-based CPU with parity-protected DRAM.
• EEPROM—Stores the serial number and revision level of the FPC.
• Two LEDs—Indicate FPC status. The LED labeled OK is green and the one labeled FAIL is red. The LEDs for each FPC are located on the router craft interface. For more information, see FPC LEDs and Controls on the M40e Craft Interface.
• Offline button—Prepares the FPC for removal from the router when pressed. Like the LEDs, an offline button is located on the craft interface. For more information, see FPC LEDs and Controls on the M40e Craft Interface.
• Four PIC offline buttons (on Type 1 FPCs only)—Prepare each corresponding PIC for removal from the FPC.
• Ejector levers—Control the locking system that secures the FPC in the card cage.

Note: For specific information about FPC components (for example, the amount of memory available), issue the show chassis fpc command.

Identifying M40e FPCs

Figure 2 shows the standard M40e FPC.

Figure 2: M40e FPC

Figure 3 shows the Enhanced Plus FPC1 and Enhanced Plus FPC2 supported by the M40e router.

Figure 3: M40e Enhanced Plus FPCs