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List of Tables
- Table 1: Notice Icons
- Table 2: Text and
Syntax Conventions
- Table 3: CoS Mappings—Inputs
and Outputs
- Table 4: Default
VPLS Classifiers
- Table 5: CoS Hardware
Capabilities and Limitations
- Table 6: Drop
Priority Classification for Packet Sent from Enhanced III to Enhanced
II FPC on M320 Routers
- Table 7: Drop
Priority Classification for Packet Sent from Enhanced II FPC Without
Tricolor Marking to Enhanced III FPC on M320 Routers
- Table 8: Drop
Priority Classification for Packet Sent from Enhanced II FPC with
Tricolor Marking to Enhanced III FPC on M320 Routers
- Table 9: Routing
Engine Protocol Queue Assignments
- Table 10: CoS Features of PIC Families Compared
- Table 11: Scheduling on PIC Families Compared
- Table 12: Schedulers on PIC Families Compared
- Table 13: Queue
Parameters on PIC Families Compared
- Table 14: Default
CoS Values
- Table 15: Default
IP Precedence Classifier
- Table 16: Default
MPLS Classifier
- Table 17: Default
DSCP Classifier
- Table 18: Default
IEEE 802.1p Classifier
- Table 19: Default IEEE 802.1ad
Classifier
- Table 20: Default
IP Precedence (ipprec-default) Classifier
- Table 21: Logical
Interface Classifier Combinations
- Table 22: Default
MPLS EXP Classification Table
- Table 23: Default
Forwarding Classes
- Table 24: Sample
Forwarding Class-to-Queue Mapping
- Table 25: Buffer
Size Temporal Value Ranges by Router Type
- Table 26: Recommended
Delay Buffer Sizes
- Table 27: Maximum
Delay Buffer with q-pic-large-buffer Enabled by Interface
- Table 28: Delay-Buffer
Calculations
- Table 29: NxDS0
Transmission Rates and Delay Buffers
- Table 30: Scheduling
Priority Mappings by FPC Type
- Table 31: Shaping
Rate and WRR Calculations by PIC Type
- Table 32: Transmission
Scheduling Support by Interfaces Type
- Table 33: Bandwidth
and Delay Buffer Allocations by Configuration Scenario
- Table 34: Bandwidth
and Delay Buffer Allocations by Configuration Scenario
- Table 35: Scheduler
Allocation for an Ethernet IQ2 PIC
- Table 36: RTT
Delay Buffers for IQ2 PICs
- Table 37: TCM Platform
Interoperation
- Table 38: Color-Blind Mode TCM Color-to-PLP Mapping
- Table 39: Color-Aware
Mode TCM PLP Mapping
- Table 40: Color-Blind
Mode TCM Color-to-PLP Mapping
- Table 41: Color-Aware
Mode TCM Mapping
- Table 42: Tricolor
Marking Policer Statements
- Table 43: Shaper Accuracy of 1-Gbps Ethernet at the Logical Interface Level
- Table 44: Shaper Accuracy of 10-Gbps Ethernet at the Logical Interface Level
- Table 45: Shaper Accuracy of 1-Gbps Ethernet at the Interface Set Level
- Table 46: Shaper Accuracy of 10-Gbps Ethernet at the Interface Set Level
- Table 47: Shaper Accuracy of 1-Gbps Ethernet at the Physical Port Level
- Table 48: Shaper Accuracy of 10-Gbps Ethernet at the Physical Port Level
- Table 49: Default
Packet Header Rewrite Mappings
- Table 50: Default
MPLS EXP Rewrite Table
- Table 51: Hierarchical
Scheduler Nodes
- Table 52: Queue Priority
- Table 53: Internal
Node Queue Priority for CIR Mode
- Table 54: Internal Node Queue Priority for PIR-Only Mode
- Table 55: IQ2 PIC and Enhanced
Queuing DPC Compared
- Table 56: JUNOS Priorities
Mapped to Enhanced Queuing DPC Hardware Priorities
- Table 57: Shaping Rates
and WFQ Weights
- Table 58: Example Shaping
Rates and WFQ Weights
- Table 59: Rounding Configured
Weights to Hardware Weights
- Table 60: Allocating Weights
with PIR and CIR on Logical Interfaces
- Table 61: Sharing Bandwidth
Among Logical Interfaces
- Table 62: First Example
of Bandwidth Sharing
- Table 63: Second Example
of Bandwidth Sharing
- Table 64: Final Example
of Bandwidth Sharing
- Table 65: Default Handling
of Excess Traffic
- Table 66: Basic Example of
Excess Bandwidth
- Table 67: Hardware Use of
Basic Example Parameters
- Table 68: Default Mode Example
for IQE PICs
- Table 69: Undersubscribed
PIR Mode Example for IQE PICs
- Table 70: Oversubscribed PIR
Mode Example for IQE PICs
- Table 71: CIR Mode Example
for IQE PICs
- Table 72: Excess Rate Mode
Example for IQE PICs
- Table 73: Default Queue Rates
on the IQE PIC
- Table 74: PIR Mode, with No
Excess Configuration
- Table 75: PIR Mode, with
No Excess Hardware Behavior
- Table 76: PIR Mode with Transmit
Rate Configuration
- Table 77: PIR Mode with Transmit
Rate Hardware Behavior
- Table 78: Second PIR Mode
with Transmit Rate Configuration Example
- Table 79: Second PIR Mode
with Transmit Rate Hardware Behavior Example
- Table 80: PIR Mode with
Transmit Rate and Excess Rate Configuration
- Table 81: PIR Mode with
Transmit Rate and Excess Rate Hardware Behavior
- Table 82: Excess Rate Configuration
- Table 83: Excess Rate Hardware
Behavior
- Table 84: PIR Mode Generating
Error Condition
- Table 85: PIR Mode Generating
Error Condition Behavior
- Table 86: CIR Mode with No
Excess Rate Configuration
- Table 87: CIR Mode with No
Excess Rate Hardware Behavior
- Table 88: CIR Mode with Some
Shaping Rates and No Excess Rate Configuration
- Table 89: CIR Mode with Some
Shaping Rates and No Excess Rate Hardware Behavior
- Table 90: CIR Mode with Shaping
Rates and Transmit Rates and No Excess Rate Configuration
- Table 91: CIR Mode with Shaping
Rates and Transmit Rates and No Excess Rate Hardware Behavior
- Table 92: CIR Mode with Shaping
Rates Greater Than Logical Interface Shaping Rate Configuration
- Table 93: CIR Mode with Shaping
Rates Greater Than Logical Interface Shaping Rate Hardware Behavior
- Table 94: CIR Mode with Excess
Rate Configuration
- Table 95: CIR Mode with Excess
Rate Hardware Behavior
- Table 96: Oversubscribed
PIR Mode with Transmit Rate Configuration
- Table 97: Oversubscribed
PIR Mode with Transmit Rate Hardware Behavior
- Table 98: Oversubscribed
PIR Mode with Transmit Rate and Excess Rate Configuration
- Table 99: Oversubscribed
PIR Mode with Transmit Rate and Excess Rate Hardware Behavior
- Table 100: CIR Mode with Transmit
Rate and Excess Rate Configuration
- Table 101: CIR Mode with Transmit
Rate and Excess Rate Hardware Behavior
- Table 102: Excess Priority
Configuration
- Table 103: Current
Behavior with Multiple Priority Levels
- Table 104: Current Behavior
with Same Priority Levels
- Table 105: Current
Behavior with Strict-High Priority
- Table 106: Strict-High
Priority with Higher Load
- Table 107: Sharing with Multiple
Priority Levels
- Table 108: Sharing with the Same
Priority Levels
- Table 109: Sharing with
at Least One Strict-High Priority
- Table 110: Sharing
with at Least One Strict-High Priority and Higher Load
- Table 111: Sharing
with at Least One Strict-High Priority and Rate Limit
- Table 112: LSR Default
Classification
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